Then I actually looked at the post, and it's about enabling W^X on JIT pages in memory. Very cool.
Then I actually looked at the post, and it's about enabling W^X on JIT pages in memory. Very cool.
That's not necessarily how it works. JITs often use inline caches that get populated at runtime. JITs usually implement W^X by mapping the same physical memory into two different address ranges. Once as RW for modification and once as RX for execution.
Having a single mapping is possible, but comes with performance penalties because execution needs to reach a safe/bailout point where that can happen instead of just atomically patching the code.
It's much more difficult getting access to the JIT's internal data structures, traversing them to find the correct RW page, then modify it, then jump to the same place in the RX page. If you already have that much control you're probably not far from getting the JIT to emit arbitrary code anyway.
Note that writing to ICs can happen from a different thread, so the current thread stack does not need to know much of the JIT's internal data.
https://events.yandex.com/events/ruBSD/2013/talks/103/
I would recommend, however, watch from the beginning.