Having more cache can potentially lower the speed of the cache, as the access time is limited by the time the longest path takes, the propagation delay.
So there's a tradeoff between cache size and cache speed, which is why there are separate L1, L2, and L3 caches of various sizes. So potentially the L3 cache in this architecture could be slower than the L3 cache in the 3000 series. It could also be the same speed if the size was limited for other reasons, such as yield.