Probably the number one reason not to start arrays at 0 in an educational language is that having the last element of an array of size 10 have an index of 9 causes quite a bit of confusion.
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Probably the number one reason not to start arrays at 0 in an educational language is that having the last element of an array of size 10 have an index of 9 causes quite a bit of confusion.
The modified ENIAC used a kind of ROM for its program (a function table), so the addition "first....with a read/write memory" deals with that.
Wouldn't a carrier indicate that the network is busy? Actually, Ethernet is a baseband system and so doesn't actually have a carrier, but for Alohanet you would only have the carrier when a transmitter was on even if it wasn't actually sending 1s or 0s at that instant.
So a really cheap computer, even if limited, would allow the young programmers to experiment and even if they ended up damaging it at a sufficiently low cost it wouldn't be a disaster.
The initial prototype hooked up two of the same processor in the first Arduinos, one running a Python interpreter and one generating a TV output. Booting to a programming prompt like the 1980s micro would encourage learning the language.
The second prototype used a much more powerful chip and the third added an ARM that could run Linux (it was the one shown in 2011 which looked like a fat USB pen drive). They realized that though the 1980s home computers booted to a Basic prompt, most of the time they loaded ready made games from cassette tapes instead. Having Linux would open up the modern Internet to the little machine.
I think they could have had it both ways - with a small local flash they could boot to a Python prompt if the SD cards was not present. With the card you would go into Linux. In a way, the original idea is finally here with the RP2040 microcontroller configured for MicroPython even though that has the flavor of cross-development instead of a stand-alone machine.
Note that people talk about Verilog or VHDL as "RTL languages". That is not correct - these languages allow hardware designs using any style to be modeled. But sticking with RTL is strongly encouraged. A design that uses the output from one part of a circuit as a clock to another part, for example, is not RTL. This might cause problems when moving from one FPGA to another or to an ASIC.
It might have been fraud for 15 minutes of local fame. This wasn't national or international news and nobody had any interest in a book of records. But it seemed real to me.
http://cini.classiccmp.org/pdf/Apple/Apple%20II%20Reference%...
You could get similar documentation for all Radio Shack products and many others.
MITS didn't set out to make their Altair 8800 an "open system". In their case it wouldn't make sense not to have the full documentation for the customers that were building their own machines from kits. But this resulted in clones and in competitors rebranding their "Altair bus" as the S100 (standard 100 pin) bus and making improvements to it as a group resulting in MITS losing control. So IBM should have known what would happen, but probably thought they were too big and important for history to repeat itself.
The point is that inside every advanced processor instructions are handled in groups and if you expose that to the compiler you can save transistors and energy.
I found the reference to Windows running on Microsoft's E2 processor (which in turn has links to relevant papers):
https://www.theregister.com/2018/06/18/microsoft_e2_edge_win...
Perhaps one day the "all advanced processors are really RISC inside" meme will get replaced with "all advanced processors are really dataflow inside".
Of course, there is the option to make the dataflow visible to the outside with the EDGE (explicit data graph execution) architecture (Microsoft even showed Windows running on one).
A very interesting recentish example was Andreas Olofsson leaving Analog Devices in 2008 (where he had been designing DSP chips) to found Adapteva to create his Epiphany chip with 16 (and later 64, with 1024 planned) RISC processors essentially in his home. He had a bit of success with the Parallella board on Kickstarter to show off the chip.
Ada was not originally an object-oriented language, though it eventually became so. But the 432 project predated Ada and pivoted to that language when it came out. Intel had to adapt Ada to work with objects (it was pretty close already).
An advantage of the 33 bit scheme to protect capabilities is that you can push them on the stack where they will get mixed with normal data and then pop them later such that everything still works. In the 432 style you would need two separate stacks or awkwardly work around not being able to push/pop capabilities.
The "AND NOT" instruction is interesting for using a mask to clear bits. which is why it is called "BIC" on the ARM.
While the 186 and 286 were flawed for making IBM PC compatible machines, for what they had been designed for they did a pretty good job.
Very large boards (9U height and/or 340mm or more depth) were used later, as I mentioned above. But I consider them the exception.
Apple wanted an ISA-like form factor so the cards became 101.6mm high and between 177.8 and 327mm deep. So a bit smaller, but not that much than more typical VME boards. The less squarish form factor does make routing signals to the connector a little more complicated.
https://millcomputing.com/topic/what-is-your-roadmap-for-202...
If you compare a paper published in a conference's proceedings with the corresponding oral presentation (which is what his videos are) there tends to be a difference. The worst presentations are those that try to copy/paste the paper into PowerPoint resulting in walls of text and those are the most likely to have a references slide.
The ad for the newsletter is very reasonable for the venue (Youtube) and if it would be unacceptable in a different context, like showing the videos in a classroom, that is not the author's fault.
Another source says "The actual internal representation is a combination of "microcode" and "nanocode". The 68000 has 544 17-bit microcode words which dispatches to 366 68-bit nanocode words." which sounds right.
Somewhere around here I have a very detailed article about this which might not be available online, but it would take some time to dig it up.
Another Z80/68K machine was the TRS-80 Model 16[2]. The Sega Genesis[3] (or Mega Drive) was another case of these two processors paired together.
[1] https://www.old-computers.com/museum/computer.asp?st=1&c=533
[2] https://www.old-computers.com/museum/computer.asp?st=1&c=242
The article mentions that "Kay gambled his budget on Lampson and Thacker’s proposal, calling it the “Interim Dynabook.”" and this budget was for Kay's group to buy more Novas and add a frame buffer to them and high resolution displays like they already had been doing. Smalltalk-72 initially ran on one of these modified Novas. With the default emulation the Alto ran all this old code right away.
Later on the Alto's flexibility allowed them to do things the Novas couldn't, like implement BitBLT and run Smalltalk or Mesa bytecodes directly. So they were not only a bridge to the past, but to the future as well.
Some people who wanted an Alto but couldn't get it made their own:
Normally it is associated with making something very popular, and in that regard the Analyst certainly wasn't. But it did get a small group to buy absurdly expensive D-machines from Xerox just to run it, though I think it was more than those who bought them to run Lisp:
http://www.bitsavers.org/pdf/xerox/dolphin/1100_Scientific_I...
More about the Analyst from later in its life: