1,994 karma · joined October 5, 2012
This has nothing to do with C. The hardware insists on this abstraction. And its a good job too, otherwise your programs would stop working when moved to a machine with different cache.
Looking at the source github, it appears I misremembered, or likely didn't even understand what Braben was saying. elite-source-bank-7.asm has a comment saying, "Update the NMI timer, which we can use in place of hardware timers (which the NES does not support)". It looks like they somehow implemented their own real time (ish) clock by counting non-maskable interrupts.
I just tried some simple "I want to grow my block of memory" test cases. A malloc of 1000 bytes couldn't be increased by a single byte without being moved to a new location. An allocation of 1 million bytes couldn't be increased by 1% without being moved to a new location.
The grand-parent comment argues that we need AI that works in a much broader set of circumstances to "solve" self driving. In particular it would need to understand how other humans would react to its actions in novel situations. That is approximately a description of having a Theory of Mind. Some argue that you can't have a Theory of Mind without being conscious. We might ban captive conciousnesses for ethical reasons.
I think you could invent lots of other scenarios that yield the "never going to happen" outcome. They probably all sound ludicrous, because having an AI that understands the workings of human minds sounds ludicrous (and frightening).
Getting the subtle elements of a UI wrong have a profound effect.
I know you can cherry pick health studies to support any argument you like but I don't feel like I've done that. The WHO guidelines/study that we linked to is supposed to be a broad summary of the whole research area. The guidelines document doesn't recommend NSS for anything. It only recommends _against_ using them for things.
> Ref[3] is obviated by ref[2] and meaningless in isolation, reasons described in the 200 page WHO report.
Whereabouts? I couldn't find what you're referring to.
A 2019 meta analysis published in the British Medical Journal said, "Most health outcomes did not seem to have differences between the NSS (Non-sugar sweeteners) exposed and unexposed groups." - https://www.bmj.com/content/364/bmj.k4718
A few months ago, "WHO advises not to use non-sugar sweeteners for weight control in newly released guideline" - https://www.who.int/news/item/15-05-2023-who-advises-not-to-...
My guess is that things tasting sweet is part of the problem. For example:
"Ingestion of these artificial sweeteners (AS) results in the release of insulin from pancreas which is mistaken for glucose (due to their sweet taste). This increases the levels of insulin in blood eventually leading to decreased receptor activity due to insulin resistance." - https://www.ncbi.nlm.nih.gov/pmc/articles/PMC7014832/
And:
"the role of sweet taste in energy intake and appetite regulation is controversial" - https://www.mdpi.com/2072-6643/6/9/3431
I expect the linear search is better when the data being searched isn't yet in cache because it allows the memory subsystem to better predict what the CPU will access next. I'm not sure how large this effect is. It would be interesting to see the benchmarks redone on uncached data.
Another ISA difference not discussed by the article is the memory model. I expect that the memory model and the degree of reordering permitted by the architecture could have a significant impact on performance.
x86 imposes stricter ordering constraints on memory accesses. The choice of this memory model was made long ago, when, I guess, it was felt that this made the behaviour easier to understand for the programmer.
In contrast, ARM's memory model permits more reordering of memory accesses, which can lead to potential data races and inconsistent program behavior. However, this greater flexibility can also lead to higher performance, as the processor can execute memory accesses in a more efficient manner by overlapping and reordering them.
I can't find any studies that measure the impact of this, but I'd be surprised if it wasn't a significant win for the ARM ISA in many programs.
Does gtest (that the author used) help with these things? Does anything?
Even the boring models command ridiculous values now: https://www.classiccarsforsale.co.uk/ford/escort/351743
For £6750 you can have one in really bad condition and with the steering wheel on the wrong side: https://www.ebay.co.uk/itm/234972695631
https://www.silverstoneauctions.com/1980-ford-escort-rec0351...
You'd have to do a imul instruction followed by a right shift. On, say, Ice Lake, the imul has a reciprocal throughput of 1 and a latency of 3. The shift has RT of 0.5 and a latency of 1.
So compared to regular integer multiply, a fixed-point implementation on Ice Lake would be 0.67x the speed if you were throughput bound and 0.75x the speed if you were latency bound.
But most (all?) other operations wouldn't be any slower than regular integer operations, so a real program would slow down by less than the figures calculated above.
"Some DSP architectures offer native support for specific fixed-point formats, for example signed n-bit numbers with n−1 fraction bits (whose values may range between −1 and almost +1). The support may include a multiply instruction that includes renormalization—the scaling conversion of the product from 2n−2 to n−1 fraction bits.[citation needed] If the CPU does not provide that feature, the programmer must save the product in a large enough register or temporary variable, and code the renormalization explicitly."
From: https://en.wikipedia.org/wiki/Fixed-point_arithmetic#Hardwar...
https://github.com/abainbridge/deadfrog-lib/blob/master/src/.... It is janky though.
To be able to call that function, I LoadLibrary("dwmapi.dll"), and then GetProcAddress(dwm, "DwmFlush").