Low-Power $5 FPGA Module
eetimes.com
eetimes.com
icestorm uses HX1K as main target, but porting to iceultra should be not an issue any more as almost all work is done.
I'm not sure what you'd do with this; at 1k LUTs you could probably just about fit an 8-bit microprocessor in there. Could you do crypto? You could get one or two AES implementations in: http://www.chesworkshop.org/ches2003/presentations/chodowiec...
The use case is for applications that require complex logic but do not require the overhead of a full-blown microprocessor. I could use this bugger in place of an MSP430 in the automatic pool leveller and barbecue temperature control devices I am (eventually) building.
In my opinion 1K LUTs is fine for a lot of cool applications - I built an ((E)EP)ROM / RAM simulator out of an iCEBlink40HX1K board to use in programming and reversing old ECUs. It works great and is vastly superior to the old school method of doing this (hardware dual port SRAM) since the pinout is configurable on the fly.
> The only gotcha is that the FPGA onchip memory is OTP, so it should either be loaded by external CPU over SPI, or from external SPI Flash, in both cases the SPI pins are user defined IO after bootstrap. Or then fixed configuration is burned into OTP.
Basically, while it -may- retail for $5 you will need an external CPU or flash for it to work. This sounds like a heavily restrictive limitation. I'd rather pay for a $8 FPGA module with actual persistent memory.
You usually need a serial flash with the data, or load it on device boot (no persistent memory)
The only flash based programmable logic from Xilinx/Altera are CPLDs as far as I remember.
External SPI flash is pretty cheap even at low quantity (~$0.50 at qty 1 for 2Mbit, going down to the $0.30 range for low thousands)
The FPGA in question seems to cost less than $2 here in Sweden in unit quantities (from Digi-Key: http://www.digikey.se/product-detail/en/ICE40UL1K-SWG16ITR50...), so at least that component by itself doesn't have to blow up the parts cost.
I should mention that someone capable of doing hobby level bga work could easily make their own at around $30 through a pcb batching service. In terms of electronic complexity, it looks pretty trivial.
As a ballpark figure, this board should be no larger than 1/5 square inch, so that's $2, for three boards.
Agree on low volumes of the other components, although things like Seeed Studio's Open Parts Library (http://www.seeedstudio.com/depot/OPLopen-parts-library-catal...) is pretty nice for the very basics.
Update: Didn't check if this board meets OSH Park's limitations.
The generic CPU could download over the air update (WiFi) and reprogram, take care of user interface etc while the FPGA can do the low-power, high throughput tasks (voice processing, video, image etc).
[1] https://www.kickstarter.com/projects/1598272670/chip-the-wor...
This FPGA will likely be used for implementing the variety of protocols in the embedded world. Imagine that you want to attach a Raspberry Pi camera to an arbitrary Cortex-M4... and the M4 doesn't support the interface.
Instead of bit-banging the interface, you simply program the FPGA to handle that for you, and to trigger an interrupt whenever a full frame of data arrives. The spare CPU cycles are then used for sleep or maybe something else.
I guess 28-pin CPLDs are already made though (Atmel ATF750C). But I really don't see how a 6-pin FPGA can be used for routing / future proofing.
Implementing something you could buy off-the-shelf on an FPGA is almost always a fools' errand.
and coolrunner is so not cool, really.. I have done it all, :) doing it since 1979