III-V semiconductors like Gallium Arsenide have a high mobility and are probably tested right now in Research labs around the world for CMOS-transistors (it is already in use for something like solar panels). But there's always the problem of how to scale these things as well as silicon based manufacturing.

Further out is still some stuff like graphene or carbon nanotubes. Of course, the structure of the transistor itself might change, which could enable further downscaling. There's already been a switch from planar to Silicon-on-Insulator (e.g. GlobalFoundries, TSMC, Samsung(?)) and Intel has the TriGate (everybody else calls it FinFet).

One day we might see the natural evolution to the gate-all-around FET, which would be something akin to a silicon nanowire (note: planar has the gate on top, FinFET has gate on top, left, and right of the channel). However, there are huge roadblocks in manufacturing to solve. And this could really be an issue. We might very well be able to build at the 5nm node. But if we can't build them fast and cheap enough, noone's going to do it. Manufacturers are already triple-patterning and doing all kinds of voodoo just to keep up with Moore's law.

Good old silicon might actually stay a central part for a much, much longer time.