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Comment by halayli | Hacker News Reader

What will the reader do while polling? If they will spin/poll, that will consume CPU resource unnecessarily. If the reader does it frequently the OS will preempt the process and pay the price.

Typically, it takes around 50ns to 80ns to access RAM via north bridge. Most probably the CPU cache is screwing his measurements.

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What can be done is part of the machine (CPU cores, interrupts) are isolated as much as possible and the latency sensitive workload load is run on that part. In that case spinning the CPU and using something like the timestamp counter (rdtsc or rdtscp assembly instruction) for timing. That will waste power and will prevent the CPU cores from going to sleep but it is possible to achieve good latencies.

As for 50-80ns access, you are right. And I would guess this workload probably represents the best case scenario and is already in cache.

In low latency usages you are doing everything in your power to avoid RAM access. Preventing preemption by "wasting" CPU resources is a common technique.

the OS scheduler will penalize you if you waste CPU resources.

Then penalize the OS scheduler by removing your spinning CPU from its available resources ;)

There hasn't been such a thing as a north bridge since Nehalem in 2008. These days the access won't even hit RAM it'll just go to on-chip L3 cache.

sandy bridge is 10% faster. Whether you hit the RAM or L3 cache depends on your memory access patterns.

Depending on the requirements and dataflows of the system an even smarter event dispatcher can dynamically switch been busy waiting and normal event notification to reduce unnecessary power usage.

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