LowRISC tagged memory preview release

I'm rooting for this project. I have a product in mind for when hardware is available. I know it will be a while, but it will be worth it.

I was sad to hear about LowRISC getting attention and energy rather than efforts like cheri (https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/). I'm super excited to hear about tagged ram in LowRISC.

Cheri influenced the design and existence of the tagged memory in lowrisc - it is pretty much why it is there, although there are some other potential uses too. Both projects are based in Cambridge.

Where is the source code? What is 'Chisel'?

Chisel is https://chisel.eecs.berkeley.edu/

Their github page is here (https://github.com/lowrisc). For example, here's the code to the Rocket processor (https://github.com/lowRISC/rocket), which is a fork from Berkeley's (https://github.com/ucb-bar/rocket).