That is exactly what make supports out of the box. If ${CC} is missing from the Makefile, ${CC} is globally set to the system C compiler i.e. cc

Users can use a different compiler by specifying it on the command line via e.g.

  make CC=clang

Some people set

  CC=gcc

in their Makefile to force the usage of gcc. Never do this. Do this instead:

  CC?=gcc

That way users can still override the value of ${CC} on the command line if they want to.