Cranky much?
Maybe your board doesn't have a jazelle-capable part, or you lack licensing for it (jazelle isn't publicly documented, sadly). Maybe you do have a bunch of gates left over on your FPGA.
I mean, it looks like a cool hack to me.
Maybe your board doesn't have a jazelle-capable part, or you lack licensing for it (jazelle isn't publicly documented, sadly). Maybe you do have a bunch of gates left over on your FPGA.
I mean, it looks like a cool hack to me.