OpenSSD – Open firmware for SSDs
openssd-project.org
openssd-project.org
I really wish normal SSDs just implemented a passthrough mode to the real flash with enough metadata about blocks that the OS can just deal with it directly. Having to implement filesystems on top of these abstractions just seems wrong. We're setting us up to later find out that we need to join the two layers like ZFS did with RAID.
And I'd gladly take a performance hit if it meant SSDs become a safe commodity product like hard drives mostly are vs the current situation where a crappy product may very well erase all its data on an unclean shutdown. Manufacturers don't want this of course because there's more margin to be had with the current stuff. Maybe some low end manufacturers could start to implement low-level flash access and Linux using it for the situation to change.
Unless someone of the Google/Facebook clubs will decide it is in their best interest to have such a thing and to enable it to be sold to others as well it is not that likely to happen.
The ONFI standard only specifies the protocol and the wiring but not the soft parameters, these may be added in there if people wanted but the flash companies are evidently only trying to grow up into the market rather than just provide building blocks as that allows them to squeeze out more profits so I can't see any incentive by them to expose such an interface and support the ecosystem that will spring up and take all of their extra profits and leave them to build massive foundries for peanuts per unit.
There is probably a benefit in adding some processing on the controller side - eg PCI virtual functions and multiple queues. But mainly you want a block device that reports errors correctly. Not sure where you want to do the error correction (thats like TCP checksum offload, generally done on card vs whole TCP processing).
This would likely require new interface ICs on motherboards and PCI cards to handle this, either that, or you run everything over USB3.0 (which is only 5GB/s).
Can I get a hit off whatever you've got over there? ;)
The first rule of hardware is that hardware companies can't write software.
I really wish I could get my hands on an SSD that I could program the firmware for to play with things. It would require more than one sample or at least the ability to replace the flash modules since it's likely I'll burn through them with the initial failed attempts. The OpenSSD I looked at did have replaceable flash modules.
http://en.wikipedia.org/wiki/Indilinx
You probably need to do a bit of reverse-engineering, but the project has released the firmware source code and controller programming information, so go for it!
Why would Flash Drives be shipped as part of the mother board, but CPUs and Memory aren't? (Unless you are purchasing a Macintosh)
Factors in favor of placing the RAM closer to the CPU are increased speed and reduction in size but I think that the power consumption will remain a problem for the foreseeable future, process differences and the amount of die space required would be another.
Technically we already have flash drives on the motherboard, they are just a connector away from being a part of the whole. I think longer term the 'upgrade, repair or discard' factor is a lot lower with solid state memory than with spinning drives, stuff tends to get more compact over time and connectors are a source of trouble. So if the connector is already on the motherboard and the device lasts roughly as long as the mb and isn't a huge cost (flash is cheap compared to RAM) then I think it will make economic sense to at some point drop the connector. Once the mSata connector is out of the way there is no real reason not to widen the bus, thats just a couple of traces.
The logic could then be simplified because there is no real reason to simulate a spinning harddrive for a bunch of (slower) memory.
And then the next step to incorporate it into a chip further upstream isn't a big one, especially since it is a relatively compact die, there are already plenty of examples of CPUs with on-die flash, no reason why x86 wouldn't follow that trend.
The biggest stumbling block on that road would be the fact that there are also different processes used for manufacturing flash than for a cpu so you'd be looking at a single carrier with multiple dies or a flash device directly connected to one of the bridge chips.
Cost wise it would make good sense, reliability wise as well. Time will tell.
6.6 years ago, here on HN at https://news.ycombinator.com/item?id=177865 , was a link to "Scientists Create First Memristor: Missing Fourth Electronic Circuit Element" at Wired. User rms said: "I don't think we'll have any keeping up with Moore's Law. In 5 years memristor storage will be everywhere. IBM will develop memristor processors for the Blue Brain project." User TrevorJ said: "I fear that the huge inertia that is the software and hardware industry ... will keep this out of mainstream for 5-8 years."
In 2010 Engadget (at http://www.engadget.com/2010/08/31/hp-labs-teams-up-with-hyn... ) described a collaboration between HP Labs and Hynix. "Williams hopes to see the [memristor] transistors in consumer products by this time 2013, for approximately the price of what flash memory will be selling for at the time but with "at least twice the bit capacity.""
If anything, the optimism has become more pessimistic, as the future horizon lengthened from 5 years to 10. :)
-full of bad cells straight from factory -block erasable
you cant simply plonk it on the board, memory map and expect access like ram.
http://www.openssd-project.org/wiki/Jasmine_Technical_Resour...
What pleases me most about this is that it's probably the first time this level of documentation has been released for a commercially-used SSD controller; in fact the biggest thing I see coming out of this is not the hardware, but the possible development of alternative open-source firmware for existing commercial SSDs with the same controller. The majority of them are going to be virtually identical to this reference design. The schematics are theoretically enough for anyone to make their own. That's why, for their other platform based on an FPGA, I don't think it's as interesting.
Unfortunately this comes a bit late to save all those bricked OCZ Vertexes (or would that be Vertices) out there, but maybe similarly nonfunctional/damaged drives with the same controller could make good test platforms for this firmware...
Open SSD firmware would be another way to prevent maliciousness; see http://spritesmods.com/?art=hddhack for example.
Your anti-malware firmware would have to disable firmware updates to prevent that, moving it into the OCZ Vertex category.
The usual firmware update happens over the regular SATA interface, and is also controlled by the firmware itself; however, there is a "factory mode" that requires physical access and is always available - it's how the initial firmware is loaded - so even if you use firmware that doesn't allow updating via regular means, you can still update it if you really need to. The factory mode might be via JTAG, or require a specific voltage on a pin upon reset to enable, and that's something that no malware can silently do...
I wonder if OCZ might've not suffered the same fate had they open-sourced their SSD firmware after they bought Indilinx, since one of the biggest problems they had was firmware bugs.
Lack of reasonably priced hardware platforms limits this project to academia.
Edit: FYI these numbers are purposely not very accurate.
Shows higher performance on SSD than ext4 and virtually all other file systems.