When people refer to "64-bit" CPUs, generally they're referring to the address space. 64 bits of address space increased the addressable memory by a factor of 2^32 over 32 bit processors. That's a vast increase, and we're nowhere near exhausting it. Even current supercomputers are massively parallel, so individual nodes typically only have a few GB of memory. The largest memory server that I'm aware of uses up to 4 terabytes of memory, so that's a factor of 1024 beyond 32 bit addressing, or 42 bits. That leaves 22 bits of expansion, each one doubling the capacity of the last. I expect that won't be exceeded before 2100 at a minimum.
On the other hand, there's the size of the general-purpose and other registers. That's currently 64 bits also in AMD64 processors (including Intel's). There are, however, specialized vector instructions that currently operate on 256 bits at a time (AVX) and the next generation due in 2015 will operate on 512 bits at a time (AVX-2).
So, on address space the answer is "not anytime soon". On the processing side, the answer is "we're already beyond 128 bits". :-)
What is that server used for?
If you talk to the right people, peakhosting.com will rent you a machine that can have up to 6TB RAM.
They may have new models out, or I wasn't aware of the highest end model...the current high-end model will address 32 terabytes of RAM:
http://www.oracle.com/us/products/servers-storage/servers/sp...
The 256bit and 512bit registers and instructions are reserved for specialty hardware, IE graphics cards were you need to do floating point arithmetic.
One more aside, the reason we call 64bit processors AMD64 is because AMD subverted Intel by releasing an architecture which had both 32bit and 64bit instructions, while Intel was creating 64bit only processors.
Also I love this question, because it was the first question I asked in my kernel development class, but the answer I got was "all will be explained in due time"
GPUs are a different avenue to exploit massive FP power, if your problem is sufficiently parallel.