A Massively Parallel Computing Solution
micron.com
micron.com
http://www.micronautomata.com/documentation/download_white_p...
"An Efficient and Scalable Semiconductor Architecture for Parallel Automata Processing
Paul Dlugosch, Dave Brown, Paul Glendenning, Michael Leventhal, Harold Noyes Member, IEEE"
In contrast, FPGAs are much more general purpose and as a result have fewer individual processing elements. Indeed, an FPGA can be made to emulate the AP for small designs, but the AP is able to accommodate much larger (or more instances of) automata on one chip, resulting in much greater throughput or bandwidth, depending on the configuration.
It is fair to compare the AP to FPGAs in the context of problems that can be reduced to regex (augmented with digital logic and counters), but not in a general purpose sense. Just because a problem might reduce to regex and can be run on the AP, doesn't mean that it can be done so efficiently. But there a host of problem domains in pattern matching that do map efficiently to the AP.
I think it is a good thing they have built.
Edit: Actually just read the paper that someone linked to. You're right that their grammar is larger than that of DFAs and regular expressions, but it appears that's because they extended it rather than because they're using nondeterminism.
This is why NDAs are better - you can run several NDAs in parallel with their states and inputs. It basically becomes vectorized problem.
It sounds a like like the Parallela boards, as in it's a 2-dimensional grid network and it sounds like they broadcast to the edge of the grid. My question is how do you scale up bandwidth, if it's broadcast, and not multicast?
http://www.edn.com/design/systems-design/4429530/3/Two-Views...
Detailed:
This doesn't seem to have changed.
http://docs.nvidia.com/cuda/cuda-c-programming-guide/#maximi...
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FYI, this made me not sign up (at http://www.micronautomata.com/ )