I've used the Xilinx toolchain as well as the Lattice toolchain. The Lattice toolchain isn't as polished as Xilinx' but I find it simpler and less intimidating than Vivado & ISE. Sure, some things could be more streamlined (i.e. the transition from Diamond to Active HDL for simulation) but it's free and gets the job done.
I find a lot of the design resources (Reference designs, user guides, tool chain, etc.) for Xilinx very ambiguous and confusing. Not to mention that certain devices aren't covered by the free ISE WebPack and require a paid license to design around some of their FPGAs. I never understood this. I think, like Altium, they do this just because they can and because people using higher end FPGAs tend to have bigger design budgets and..well...they can get away with charging for the design tools.
Lattice has positioned itself to be an IoT FPGA company whereas Xilinx seems to keep developing FPGAs that have incredible computing power / bandwidth / logic capacity / etc. I think the complexity of the toolchain scales with at least the square of the capability of the FPGA.
If you are looking for a super-capable starter FPGA/CPLD, take a look at the Lattice MachXO2. It has embedded flash so you simply program the device and it comes up that way the next time you apply power. No external serial flash to worry about. There's even a breakout board for the MachXO2[0] that makes prototyping and adding capabilities via "shields" very straightforward.
I have no experience with Altera so I can't comment there.
[0] http://www.latticesemi.com/Products/DevelopmentBoardsAndKits...