Introduction to MIPS assembly language (2007)
chortle.ccsu.edu
chortle.ccsu.edu
And MIPS is still a great instruction set to learn the basics on.
Cavium was not yet sharing eval parts when I left this field, just a bit before Intel cancelled their NXP line (which was fun to play with).
Anyway, I hope Cavium succeeds with their Thunder. Perhaps there is a large enough "anything but Intel" market for them in the microserver world.
NXP still exists in Netronome..
The IXP was an interesting family, but I recall the toolchain being less than pleasant - although at that time the MIPS vendors weren't covering themselves in glory either.
Intel is closing the gap with their DPDK, but Cavium creams them on clock-by-clock and on cost of goods.
Cavium Octeon chips currently scale to 32 cores at 1.4Ghz, but with ZIP, GZIP, AES, SHA1, etc coprocessors running at 800Mhz. All cores share a fast, coherent unified L2.
One of the key advantages of the Octeon architecture is their hardware work scheduling unit. This is essentially a highly programmable hash engine on packet fields (with software-only bits for software classify-then-reschedule). The idea is to ensure that no packets with identical hashes are in flight on any core at the same time.
If programmed correctly, this work scheduling prevents data structure contention, which is particularly problematic when you scale to 32 (and next-gen up to 48 [then I believe to 64] cores).
The chips also support direct packet transport (XAUI, SGMII, etc), rather than requiring transport across PCI-e. Each of these ports can be programmed separately, so you can use switch-specific goofy encapsulation modes (Broadcom HiGig2, Marvell DSA, etc) to support very quick traffic <-> physical port mappings.
I should also mention that Cavium scales down very well, all of the way to configurations like 2 cores at 400Mhz for PoS, SOHO usage, and such. So it can be an attractive architecture to target.
Finally, Octeon family MIPS64 has a lot of MIPS64 extensions, like branch on bit, posted atomic operations (e.g. statistics, where you don't care about the value, you just want to += 42 it), pop count, fast bitfield subfield extract, etc.
They're "just" mainly in niche fixed-function products, so few people tends to get to program them.
For the more complex exercises, I've found writing a working program in C first to be beneficial. At first I used Emacs Lisp because its nice to write in Emacs, which I'm using along with the Assembly major mode. C has less of a cognitive shift during translation since its much closer to what you're working with.
In a stoic sort of way, I have a new appreciation for C and an even greater appreciation for lisp. This, however, has not interfered with my enjoyment of learning MIPS, which I'm deriding much of from this book.
What are MIPS processors used for these days?
Not a lot of general purpose use anymore since the golden age of the SGI/N64/PS2/PSP.
Really, the only growth left for MIPS is through China's government's technology independence initiative in developing the Loongson/Godson CPUs, for which they licensed MIPS. A Loongson powers the laptop that RMS uses.
D. A. Patterson, Computer organization and design: the hardware/software interface, 4th ed. Burlington, MA: Morgan Kaufmann Publishers, 2009.
https://github.com/jevinskie/mips--/tree/master/project4/sou...
I would recommend anyone interested in VHDL to read this article about the programming style I used. I found it to be a great help.
https://news.ycombinator.com/item?id=7272652
Or direct link to the actual project: http://yasp.me/
If you're interested in assembly but don't want to learn it with tools that seem old (qtspim), yasp gives you a nice web ui to step through your assembly code.
I did a basic tutorial for my class when I took computer architecture. I think I got most of the basic stuff right. Probably some mistakes and lack of insight how stack works at the time I was writing the tutorial. Correction is welcome.
(Had to look those two up, I remembered them as LACC and YEX)
There are still lots of markets that use MIPS. In addition, China seems interested in a national ISA and seems quite invested in MIPS. I wouldn't write it off just yet.
I would say that MIPS is the only ISA that has definitively proven itself in everything from tiny microcontrollers to multi-core, SMT (hyperthreaded) monsters that run most of the world's networks or the upcoming Chinese petaflop supercomputers.
Never used it afterwards.
In terms of architecture or opcodes, there is hardly any relation.
Many thousands of teenagers picked up X86 (and X86 protected mode!) from nothing more than the MASM Bible during the 1990s, so rather than overcomplicate things, I might just say "don't let yourself get intimidated" and dive right into X86.