Open Hardware Bitcoin Miner | Hacker News Reader

Open Hardware Bitcoin Miner

github.com

76 pointsGeorgeHahn24 comments

This is not really open. Where are the ASIC design files?

The GitHub says open board. I gather it's someone unrelated to the company that makes the ASICs, that would like to buy discrete chips rather than a whole package from Avalon.

I suspect this is a clever way to sell more Avalon chips (they're over $100 each if memory serves).

I remember reading that the chip was designed by a kid at NYU-Poly. How is a college student able to design and manufacture such an awesome chip?

The chips are supposedly pretty damn simple, so the key is having access to the software tools (which a kid at Uni will have access to) and the capitol to run an order with a fab.

Isn't it just a hardware implementation of SHA256? Shouldn't it be very straightforward? I fully expect that the undergrads in the logic design class I'm TA'ing will be able to do it. It's really not very much harder than writing a program that computes SHA256.

A really really good implementation is probably harder but I think the intersection of engineers with the required design skills, access to the design tools, access to foundries and people interested is bitcoin is minimal.

If you are a TA, why not assign this as a lab assignment? Some group could come up with an optimized approach. Could be fun to distrub the ASIC mining market a little.

It's something I was just thinking about as I was writing the comment but I didn't like the idea too much. The course now only has time for two serious projects: one is a game and another is a a little CPU. I think they're the right combination of fun and pedagogically useful.

In terms of what students would learn from this project: it would be some fairly straightforward sequencing and buffering logic and the weird combinational munging that hash algorithms tend to do. I think there's more to be learnt by building the little CPU. And we have quite a few sophomores who may not appreciate what a cryptographic hash function is and why we might be interested in building a hardware accelerator for it. We could possible do some extra sessions, introduce them to hash functions, motivate hardware accelerators and so on but it seems like it's not worth the trouble.

I think this assignment would be more suitable for a crypto/security course in an EE department.

Pretty cool, but I think the PCB design will need a bit more work before it can be assembly house produced. There seems to be a lot of pointless via in pads that are not plated over (plated over costs $). From most assembly houses I've dealt with this is a big no-no (usually they'll still try, but expect tombstoning and other bad things as solder is sucked through the via). Same thing with the QFN/P parts.

If I had a copy of OrCad I'd love to check out the actual schematic/layout, the Upverter doesn't seem to be updated.

I agree. The via in pads was done more as an experiment to see what would happen - I'd never tried it before. They lower the inductance on the ground path, but it's not a huge deal. They'll be relocated in a future iteration. The QFNs have more vias than they need.

This is a similar commercial design, currently available, using the bitfury chips: http://eligius.st/~gateway/products/hashbuster-micro

Unfortunately the tremendous demand for Bitcoin mining hardware means that although there are several chip vendors now the market is not very competitively priced— the chips are selling a huge multiples of their marginal cost.

    > Unfortunately the tremendous demand for Bitcoin mining hardware means
    > that although there are several chip vendors now the market is
    > not very competitively priced

Doesn't this just increase incentive to sell this hardware yourself and price it lower? There's no way that this demand has already saturated all the pcb shops and asic fabs or already eaten away the margins..

Very impressive.

Also very necessary once all those 600 Ghash/sec miners come online in the next 30-60 days. The difficulty will go through the roof.

I wonder what it costs to build a 10 chip board. Single chip 2.5Mhash/sec bitfury chip board originally cost $100

Aside from the ASICs themselves? Cheap, if he can get a large board run together. The real questions are, how much for the ASICs, and are you capable of mounting BGA.

Looks like 500 for 6 BTC. Like $14. I wonder if anyone would want to put together a batch order?

where do you see that?

On their site: http://avalon-asics.com/product/a3255-55nm-chip-500-count-re...

One place where to organize this would perhaps be the project's Wiki.

Those are the old 55nm chips. There are 28nm chips now.

Avalon gen1 is 110nm. The (new) Avalon gen2 is 55nm.

KnCMiner is the only competitor who has 28nm chips, but their chips are merely 1000 Mhash/Joule, which is a power efficiency pretty close to Avalon gen2: 730 Mhash/Joule.

No BGAs, I think you might be seeing the crazy thermal via arrays under the chips (I went a little overboard, the next revision will likely have a couple less vias on each chip). The hashing ICs are QFN.

This would be a really easy board to manufacture. Low unique part count. I just need to move the decoupling cap vias out of pad and it'll be ready.

Can you use an ASIC miner for Litecoin mining?

Currently, no.

However, Alpha Technologies has announced[1] an ASIC targeting scrypt (or at least Litecoin) in development.

[1] - https://bitcointalk.org/index.php?topic=341939.0

Seems like that'd be hard to do effectively, since the whole point of scrypt is to put more of the burden on memory. It precomputes a lot of data that it reuses, and it's faster to retrieve from ram than to recompute it, even with specialized hardware.

From reading over the press release it looks like they intend to build an ASIC that is only as powerful as a high end GPU but instead of needing the full $350 video card you will only need the $25 ASIC. Then you put 14 ASICs on a single board and get 14X the power at the same cost. Though I'm sure the company will charge 10X the price of the video card. Ideally there is some real power savings in the ASIC.

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