That said, I'm a chip designer with ASIC experience. I think it would be pretty fun to work with a couple software oriented folks to design and build something here.
ASIC design software tools would probably require funding, but FPGA prototyping can be done at very low cost.
Some of the smaller operations worked much as you imagine, though. They did FPGA prototypes and then raised funds to move to ASICs.
They often raised funds on the bitcoin-denominated stock exchanges. A handful of guys could raise money via an ipo, get the chips produced, open an operation, and then share the revenue with shareholders via dividends.
Some operations were just a couple of project manager outsourcing all the engineering and manufacturing. In at least once case, the ASIC design was done via ODesk (!)
It was a risky business, on both ends. The investors rarely knew much about the people they were giving money to, and the entrepreneurs were taking money from people they didn't know much about. With no guarantees that anyone had any idea what they were doing.
Those companies are reaching their endgames now, having either worked out ok or failed. Millions of dollars have been made, and much money has been lost.
It's been fascinating to watch. It's a crazy pace and intensity even for a bunch of startups.
There's a nice book in telling their stories, if anyone could actually find any of the people involved. Ha.
Worth looking at for their stories- ASICMIner, the first wildly successful ASIC IPO.
Active Mining, a rare US based company that IPOed.
LabCoin- A company that may or may not have been a scam, but is in the process of failing.
Maybe there's an open market in memchached acceleration(basically computing hashes). Convey does this with FPGA's[1], and offers 3x performance/$.
Or maybe other cloud compute acceleration stuff.
I wonder though: if we're talking about using someone like easic.com( so scaling a business would be less risky and more investor friendly, since they can do low and mid volumes) ,How would the investment costs would look like(for 45nm/28nm) ?
[1]http://www.enterprisetech.com/2013/09/24/convey-revs-memcach...
http://thegenesisblock.com/easic-announces-24-ths-hash-fast-...
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[1] https://www.cloudcracker.com/blog/2012/07/29/cracking-ms-cha...
[2] https://www.cloudcracker.com/dictionaries.html (in the mouseover text in the graph for brute-forcing DES keys).
I haven't looked through the relevant stuff in the Spy Files (vendor presentations from the ISS World surveillance conference), but that might be one place to look to find people making crypto-cracking ASICs for a profit.
http://wikileaks.org/the-spyfiles.html
They only have documents through 2011, although the conference is still happening frequently.