Basically there is a bit of circuit where every word of memory connects to a bus. The Mux decides which one of the words is loaded on the bus. A series of wires controls which gate is open.
If there is 1 wire there are two possibilities
0, 1
If there are 2 wires there are four possibilities
00, 01, 10, 11
If there are n wires there are n^2 possibilities.
Not using all the possible words for the number of wires. Example 3 words when using 2 wires would cause there to be inputs that break the state machine the instruction stack is interacting with and make developing for the chip very complicated.
So the number of words that can be pulled is restricted by the capacity of the Mux, which is driven by wires that are either off or on. This causes the powers of 2.
The first is not always power of two - a machine with 6GB of ram works just fine, the third - it is more convenient to allocate power of 2 sized blocks of ram because this makes the allocation algorithms faster.
The second - not sure but I suppose it is more convenient - while there may not be reasons while you cannot have 1023 Mbit block it makes no sense because everything else is based on the power of 2 in computers anyway.