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Could you extend JTAG to provide verifiable hardware?

I'm thinking of something like Vernor Vinge's "trusted computing" stuff in his SF book _Rainbows End_, where a flipflip took 20K gates to implement. You spend a lot of circuitry on attestation.

It's probably a circular problem (who will attest to the attestors? etc.), probably devolving into digital signatures of chip layers and stuff, taken before installing CPUs an peripherals... :-/

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You cant trust the electrical interface to be honest if the hardware isn't honest. If a naughty processor can modify a bunch of instructions, then it can modify its verification results or whatever is provided over the interface.

FPGA's would be a better idea and actually might be viable for a small trusted compute base.

You would think that there would be more activity in the OpenCores and other processors on a FPGA systems, but there's not as much I expected when I researched it. Maybe the renewed revelations about the NSA will increase the participation and lower the costs.

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