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Oh this fills me with a mix of nostalgia and dread. The first time I saw a 'flat' instruction set such as MIPS and ARM, with a large file of registers that are treated the same, was really refreshing.

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I'd imagine that examining an efficient stack architecture like the J1[1] would be even more refreshing. No need for register allocation and tremendous gains in code density. You lose the ability to do out-of-order execution, but in many situations independent operations can still be combined into a single clock cycle, and the CPU is still faster because it simply has less work to do.

[1] http://www.excamera.com/sphinx/fpga-j1.html

Isn't that even worse? Now, you have to reorder your instructions to make them more efficient and avoid exchange instructions.

Some stack architectures (e.g. Hobbit) use small offsets to allow addressing into the stack, which adds some of the flavor and flexibility of a register-based machine while still conceptually keeping all values on the stack.

Very cool link. Stack architectures faded a while ago, but I think most of that was just the huge divide in cpu to memory performance. I think there is a niche in parallelism for simpler, stack based CPU again.

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