It is pretty cool technique. There are a few things you can do via FIBs but what I'm thinking of here involves cutting a very fine hole through carefully targeted areas of the chip to expose the element in question (or its wires) so we can observe them. We actually have had to do this for debugging a couple of times on 32nm chips (cutting down in and pico probing ). we mostly only got away with it because we had all the floor plans, masks, RTL, documentation and very fancy equipment though, it would have been very difficult otherwise.