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Intel has a cache-as-ram (CAR) mode / Non-Eviction Mode, which is what you wanted but it is only available before DRAM is brought up via core initialization. Not sure about AMD.

AFAIK AMD doesn’t do this because it’s a pain in the butt to do from a hardware and firmware perspective. They basically have their equivalent of the intel ME do RAM for training and then the main cpu comes on with DRAM already up. At least it was like that five years ago when I last worked on an AMD part.

I used to use a full Slackware Linux distribution with X-Windows on a 486 clone with 4 Megabytes of RAM.

I suspect this will also be sliced across cores on a CCD, which means even less effective cache for a single core boot

I suspect someone at AMD could do this, but it would require a custom build of the CPU since the memory controller would have to change.