Wafer-Scale Superconducting Transistors Cut Cryo Cables

>"They fabricate their superconducting transistors on a 6-inch (150-mm) silicon wafer. Their CMOS-compatible process involves laying a graphene channel upon the wafer and shaping three electrodes from an aluminum-based superconductor. Two of these electrodes touch the graphene channel to create an aluminum-and-graphene Josephson junction. Then, controlling the voltage through the third electrode—the gate—can change the critical current or switch the superconductivity on or off.

Graphene isn’t normally a superconductor, but with the right conditions, the electrodes can “leak” their superconductivity into the graphene.

The researchers spent years fine-tuning their process to achieve those conditions. Their device’s geometry, materials, and engineering had to be just right."

Isn't that interesting! Graphene, or at least a very small 150nm-scale "nano surface" of Graphene becoming a superconductor under the right conditions! It'll be interesting to see where that goes in the future...