A lot of that is the lack of SRAM scaling. There’s still quite a bit of improvements in the back end (metal traces). That aside, if foundries adopted say a 1T-1C SRAM we’d see a pretty rapid density doubling
Apparently the N2 -> A14 density increase for logic is 23% (Tom's Hardware), and about 0% for both SRAM and analog.
Both CPUs and GPUs devote considerable space to SRAM (registers & cache), and are 50% or less logic, so for them the density increase will be more like 10% rather than TSMC's 20% marketing number.
Aka eDRAM? It was a thing back on 14nm node, but AFAIR not so much anymore. The 1C part is hard to get right in a way that is compatible with a logic process.
eDRAM isn't the same as 1T-SRAM, which isn't quite the same as 1T-1C SRAM...
But overall they run into the same problems that you mention; it's just too hard to get a capacitor in play.
There is Zeno Semi's Bi-SRAM, buuuut it hasn't seemed to catch on for one reason or another.
Looks cool, but isn't it by definition planar process-only, no FinFET for you?