alon.horev.net
But I also think that to do hardware design in VHDL or Verilog, you need to understand the underlying structures - latches, flip-flops, decoders, muxes, etc.
I'm enjoying this recent trend!
entity and_entity is
port(
x, y: in std_logic;
result: out std_logic
);
end and_entity;
To me, it's making an always-on connection, such that any electricity on either line "x" or "y" will induce an identical electrical current on "result". This would obviously include any electrical signals, including HIGH/LOW pulses. And they're combined, so HIGH on either "x" or "y" outputs HIGH on "result".
Because of how I read code, I see that as: whatever is in buckets "x" and "y" are combined and copied into bucket "result".
I've never thought of lines, buses, leads, wires, etc as buckets. Yet that's how I think they're described in this code. But if you think about an individual clock cycle frozen in time, some wires have HIGH pulses, and the intention is to copy the HIGH pulse from that wire/bucket.
A really interesting mental-model barrier to watch hardware newbs overcome is to present them with designing a counter - and watching as the very first thing they want to type is a for loop, which is generally not how you'd do it, but almost reflexive to someone who has been programming for a while - particularly in an imperative style.
Mind, I don't fault the author for being surprised. It's a logical consequence of that remove. But as somebody who grew up with blinkenlights and core memory, the idea of not knowing this fact is completely foreign to me, even though I have no HW skills worth mentioning.
Part of me wonders if that means we should teach SW engs about those realities. Especially given the authors wide-eyed realization that all that code executes in parallel, all the time. It's a mental model that seems rather useful given the amount of parallelism we see and will be seeing.
Or maybe I'm just old and grumpy ;)
As I said, I don't see not knowing this as a fault - it's a product of our current environment and the fact that the gulf between HW and SW has widened. As such, it's not making me grumpy. I just thought it made an interesting point about how much we've progressed.
And good on you for pointing it out and teaching about it!
Only barely. Modern FPGAs are made up of LUTs and flip-flops, which can be abstracted as "cloud of programmable asynchronous logic surrounded by D Flip-Flops". I think if you start by explaining the abstract notion of asynchronous logic, and the notion of gating a design using D flip-flops, you can get someone up the HDL learning curve really fast without going into the depths of what boolean functions are, what a mux is, etc. Boolean functions and muxes aren't a central component of modern programmable logic anyway.
I've been thinking about writing up "30 minutes to your first HDL design" at some point. Dragging a competent C programmer up the learning curve is pretty easy, as long as you don't start off with "it's like C but...". I've trained a few SE interns to write some halfway-decent CPLD designs in just an hour or two, and consequently I think that the way they've taught it at school is way too low-level for someone that's going to be working with modern programmable logic, and it needn't be so painful.
Sadly, I'd lean towards the second one because of text like this:
> A major difference between software written for CPUs and VHDL is: VHDL is concurrent by default.
VHDL is a description language, not a programming language.
When writing VHDL you are not, at any point, writing software, you are laying out a map of the hardware. This map describes physicalities, and (barring relativistic considerations) physics happens everywhere at once. It is not parallel computing, it is physics.
The difference is essentially that with a normal CPU, the function is changed every time you load a new instruction. With FPGAs, you allocate a bunch of logic arrays to just one specific block of instructions all the time. That gives you the magic parallelism.
(The point is: you might argue that VHDL is just describing logic, but so is any other compiled code!)
Agreed, this is a program, yet this results not in software, but (configured) hardware.
> That gives you the magic parallelism.
And thus it follows that it's not magic at all, merely physics. Put an electric signal in, an electric signal gets out, and everything happens at 'once' (bounded by the speed of light and various other electronic considerations). This is what the essential difference is: hardware (however configurable, it is not software) vs software (however low-level, it is not hardware), and it is a very fundamental difference.
Hardware - write concurrent code, write serial code where needed.
Mind you, I like your article, but I just feel it may make some hardware beginners get some fundamental basics wrong.
As an anecdote, I personally noticed the critical importance of this distinction first hand, as in a software program, we went through a hardware course on this very subject and the teacher incessantly restated this fact, with due reason since later down the road each one of us understood that basically every single mistake one made was due to one trying to shoehorn software concepts into hardware, or expecting software behaviour from hardware.
Well, you would not be writing a virtual machine, you would be writing the hardware definition of a real machine. A virtual machine is virtual precisely because it's hardware mimicked by software, whereas there you're doing hardware directly.
Arduino and Launchpad helped me too. I expect to see custom Minecraft maps made of a small microprocessor -- with some way of loading the same code on both the game's microprocessor and the real-world microprocessor, and watching the code function both ingame and in the real world simultaneously. Serial logging could even be used to maintain concurrency between the microprocessors.
Mentioned elsewhere in the thread are really good ideas to internalize. HDL isn't programming. You aren't merely writing instructions for a state machine, you are describing the state machine. It is very important to learn how hardware constructs are described by HDL. The best practice is to design tbe hardware on paper and then describe that architecture in HDL.
Sounds like the massive scale software of the future even - possible huge field just waiting to take off when paired with at-home 3d circuit printing technology?
The world just keeps getting better...
http://www.amazon.com/The-Elements-Computing-Systems-Princip...