Why? I have not seen anything outlandish for a NN implementation (vs a NN simulation).
> can pull off the error correction
There lie the issues that have not been mentioned, the solutions not explained. Analog computing means: * costly digital-to-analog at the input and analog-to-digital at the output; * sensitivity to environmental conditions such as temperature; * signal dispersion hence the need to boost it in the path.
Maybe checking the patents they registered?
Flash NAND can routinely be bought with 4 bits per cell, perhaps even 5 soon (QLC and PLC drives). Since it has been proven to store 4 digital bits at production scale, I’m willing to bet an analog architecture running an LLM should be able to yield the performance analog of a 4-8 bit quantized model. Where in that 4-8 range is pretty crucial, but it depends on the specific design.
[1] https://www.nature.com/articles/s41928-023-01010-1 [2] https://www.nature.com/articles/s41586-022-04992-8
Bottom of page linked from HN (currently https://www.mythic.ai/) indicates they're hoping to demonstrate something that could that in 2028 or later, and both Nvidia and Cerebra are looking at 10x'ing models to 10T+ plus in 2027.
So they may never catch up on LLMs.
They're a good fit for the companies they're working with and have taken investment from, ex. Toyota, that aren't doing LLMs.
https://www.mythic.ai/vanguard
Seems big, IF true
The technology that could run LLMs should be the "Vanguard", but as the homepage says, "the M1 (scope: Edge/Cameras/Drones) is there, the Vanguard should be a reality in 2027".
You generally don’t need error correction. Instead, you do a retraining of sorts where you basically fine tune the model on the target chip architecture. Because these systems are so complex, errors tend to localize without affecting overall output.
My understanding is the hardest part is actually noise in the analog system.