Hacker News Reader

Comment by Conan_Kudo | Hacker News Reader

I'll also point out that we've always had better starting points for open source high performance cores. SPARC and POWER both have open ISAs and open-source cores with useful performance. The UltraSPARC T1 and T2 processors were open sourced under the OpenSPARC project. POWER has the OpenPOWER project governing the Power ISA, and IBM itself created Microwatt, Chiselwatt, and the A2I/A2O cores as open source that people can build their own PowerPC systems from.

OpenFirmware came out of OpenSPARC and is also used by POWER too. Parts of it are used in ARM and RISC-V today (mostly DeviceTree, though arguably quite badly).

Nobody actually wants to make good cores for cheap. Nobody wants to make compatible systems unless forced to. That's why ARM and RISC-V are fragmented messes.

View on HN

True, and the only reason I'm partial to x86 and even some older ARMv cores is that there is a huge existing software ecosystem already available, reducing the need to develop new bootloaders and ports, as coding hours aren't free. CISC cores are treated as if they are a dirty word, but are more versatile for covering various applications.

PowerPC at least still has a living ecosystem, even from the bootloader level. GRUB can boot from an OpenFirmware system. There's also yaboot if you hate yourself. ;)

I would personally love to see more Power Systems based projects. Everything is out there, just someone has to want to do something with it.

Fedora Linux even fully supports POWER8+ little-endian systems, and Fedora KDE offers a live ISO you can install on something like a Talos Workstation.

There have been some PowerISA implementations, https://libre-soc.org/openpower/ although libre project had a major setback a few years ago:

https://lists.libre-soc.org/pipermail/libre-soc-dev/2024-Sep...

Yes, but compared to RISC-V neither OpenSPARC nor OpenPOWER are really going anywhere. Not really sure why, maybe the lawyers read the fine print about the level of openness they actually provide and decide that nope, not gonna touch that one?

Technically just looking at the ISA both SPARC and POWER seem fine enough. So why is nobody interested?

(Talos is interesting but not really an answer to the question, as it seems to be focused on building affordable-ish systems around an existing CPU, not developing new CPU's.)

OpenSPARC is under the GPL, which is probably why it didn't go anywhere directly. OpenPOWER is under permissive creative commons licenses, and people are iterating on the open source cores released by them. But the arrangement with efabless didn't go anywhere, and the company shut down last year without warning. So there's nowhere to experiment with producing chips.

https://wafer.space allows chips but I think tinytapeout became what efabless was doing: https://chipfoundry.io/

Also Hitachi's SH-2 & SH-4 patents expired in 2016, so J-core picked up where they left off: https://j-core.org/

MIPS also went open source around 2018: https://www.datacenterknowledge.com/data-center-hardware/mip...

Reply on news.ycombinator.com