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I think the GP is talking about the Hazard3 [1] core. This is one of the CPU cores besides the ARM M33 instantiated on the RP2350 µC [2]. See this article from Luke Wren (Wren6991) back when the RP2350 came out [3].

[1] https://github.com/Wren6991/Hazard3

[2] https://www.raspberrypi.com/products/rp2350/

[3] https://www.raspberrypi.com/news/risc-v-on-raspberry-pi-pico...

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What I find interesting is that RP2350 is designed as "one or the other", no way to use ARM and RISC-V concurrently, and has fuses that can kill ARM M33 cores outright.

Makes me wonder if an "ARM cores fused off, RISC-V only, no ARM fees" SKU is possible.

Several of the peripherals in the RP2350 are also ARM IP.

You can choose Arm in one pair and RISC-V in the other pair if you want.

Thank you!

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