However, the Intel Xeon E-2236 was released in 2019; so it's hardly ancient and the current E-2400 isn't so different.
As for hardware register renaming, Tomasulo dates to 1967 and out-of-order ROBs were common in the 90s. I don't know that there's been any major new ideas microarchitectural ideas in register renaming since the 90s.
I still think it's a meaningful experiment but could be improved with consideration of microarchitectural features.
You can make a programming language that uses whatever convention you want, but every time you make a system call or a call to a C or Rust library, you're using essentially an FFI and your FFI logic will have to handle the register spill and recovery to match the convention. And if you convert your code to a library, then it'll have to be dumbed down as well.
Intel introduced the RAT (Register address table) with the P6 in 1995. Although IIRC it depended on ROT(Register Order Table) and wouldn’t affect the outcome the same way.
I think Netburst is where it really was extended to support out-of-order pipeline stages.
As long as the CPU does’t violate the interface contract it can micro-optimize at will.