Designing an Ethernet Switch ASIC
essenceia.github.io
essenceia.github.io
I had a Google interview collapse because the last interviewer was a Principle Engineer who just couldn’t accept that a switch will ever forward a frame before reading in full and checking the FCS.
I was too much of an idiot to go along with it and instead ended up having an argument with him.
As far as advanced features go, even adding and removing VLAN tags is a headache in a cut-through switch.
Not really; it just needs to inject the tag right after the source address, or not pass it through at all; and of course recompute throughout and replace the FCS at the end. Other more advanced packet editing can be done in a streaming fashion too, with the latency only limited by the length of any "forward references" needed.
With a traditional cut-through switch the entire packet is passed as-is, so you're not modifying a corrupt package. You don't drop it, but the corruption is trivially detectable on the other side. If you naively recompute the FCS on transmit you essentially mark a corrupted package as valid, so you have to compute the FCS on transmit and receive, and intentionally send out the wrong FCS on transmit if you determine the receive FCS is invalid.
That said, there are lazy hardware designers that just slap on a block to recompute the CRC and replace the old one with the new. An experience I had years ago at Red Hat taught me that the hard way as a shiny new Cisco ethernet switch IT deployed ended up costing us weeks of frustration and delayed a release when it caused bit flips in NFS packets during stress testing. The switch was so awesomely advanced that it recomputed the CRC on the bit flipped packets causing kernel builds to fail. <sigh>
The lack of end to end ECC protection in some packet paths on very high end ASICs is something I just can’t get over.
Yes, exactly; but that isn't particularly difficult either, compared to all the other packet-editing capabilities that switch ASICs have.
Most data-center networks are involve aggregation/spine/core switches at higher speed than TOR/leaf switches - so the packet has to be buffered.
Most every workload is going to involve port collisions (2 packets at the same time needing the same output port) - again a full buffering required (or drops and throughput reduction).
Bigger networks start using vlans, mpls, ip routing at switches, and vxlan - requiring more lookups per-packet, larger "minimum chunks of packet seen before port is determined" sizes, etc reducing the value of cut-through.
And so on.
But i also struggle to find a scenario where a principle engineer at google is refusing to accept that cut-through switches exist, but rather, was refusing to accept that the scenario they're talking through with you would ever involve an effectively deployed cut-through switch (since that's basically never).
Nope, the argument was exactly if a cut-through switch exists or ever existed
Edit: Actually the conversation came back to me:
He asked me about the frame format. Once I drew that on the board, he asked why is the DST before the SRC. My answer was in order for the switch to start doing the lookups ASAP and that's when I mentioned that a cut-through switch can switch the packet before it even finishes receiving it.
After that we spend the rest of the interview time arguing if cut-through switches actually exist or not. Both he and I having too big of an ego to let it go..
No, he didn’t want interrupt the interview to start checking out phones.
“I told him we'd have to agree to disagree.”
That’s where I went wrong. But I like to think learned my lesson.
The best possible outcome.
“Arista data planes support these packet forwarding modes: Store and forward: the switch accumulates entire packets before forwarding them. Cut through: the switch begins forwarding frames before their reception is complete.”
Cisco:
https://www.cisco.com/c/en/us/td/docs/switches/datacenter/ne...
HPE Aruba:
https://arubanetworking.hpe.com/techdocs/AOS-CX/AOSCX-CLI-Ba...
Fortinet:
https://docs.fortinet.com/document/fortiswitch/7.2.7/adminis...
Arista:
https://arista.my.site.com/AristaCommunity/s/question/0D55w0...
Nvidia/Mellanox:
https://enterprise-support.nvidia.com/s/article/switch-forwa...
Extreme Networks:
https://documentation.extremenetworks.com/Switch%20Engine%20...
"Defines a class of service for time-critical frames that requests the transmitter in a bridged Local Area Network to suspend the transmission of a non-time-critical frame, and allow for one or more time-critical frames to be transmitted. When the time-critical frames have been transmitted, the transmission of the preempted frame is resumed. A non-time-critical frame could be preempted multiple times."
When it works, it reduces latency and reduces buffer memory usage a smidge. This ASIC switch can't afford to buffer any packets, so cut through is the only option... AFAIK, most ethernet switches have at least some buffer memory...
> Most data-center networks are involve aggregation/spine/core switches at higher speed than TOR/leaf switches - so the packet has to be buffered.
If you have traffic flowing within a rack, you can cut through for that where the machines attach to the TOR switch at the same speed.
If you have traffic between racks, and it goes through a spine, it likely needs to buffer at the TORs, but it could cut through at the spine.
> Most every workload is going to involve port collisions (2 packets at the same time needing the same output port) - again a full buffering required (or drops and throughput reduction).
Depends on the workload and redundancy requirements. If you want to have dual link aggregation and no loss of throughput with a single lost link, you'll upgrade line speed when link utilization is at 50%, so maybe 50% of packets could be cut through (depending on burstiness). If latency is a key driver, you may have line speed much higher than throughput and have very little utilization.
Then I was disappointed to enter the real world of networking and learn that it wasn’t actually used as often as I had been led to believe due to conflicting with higher priority features.
So the interview may have been a conflict between textbook learning and the Google engineer’s practical experience. It’s tough to encounter that conflict in interviews because you get two people talking past each other.
I have a (really dumb, kinda meme-y) project involving a dead hakko soldering iron and "Internet of Soldering", a custom ASIC for the actual front-end would be the appropriate level of silly and possibly could fit in the project budget.
I detailed the roadmap for custom ASIC design a bit here: https://talesonthewire.com/projects/two_weeks_until_tapeout/... and joining the Tiny Tapeout discord community is a great place to reach out for help.
Just saying, it's good form to do network stuff in big endian. Although since it's already done I dunno how hard you should work to retcon that to 0xFECA...
Although I should point out that you missed the opportunity tor making the world's slowest counter and avoiding needing any expensive memory. Just declock it to an extreme degree. Hard to debug a design that never outputs anything for literal eons though.
So, since clocking low can't save you many bits, might as well give it enough bits to handle any clock up to the limits of your transistors.
This used the librelane classic flow, so it's a lot of verilator, yosys, openroad, opensta, magic and klayout. :)
I'm surprised you managed to fit something like this in a TT grid square.
Also how much you can fit really depends on the node the shuttle is targeting. So I was in luck that this was on Global Foundries 180nm as you can cram in a lot for flip-flops onto a single tile compared with Skywater 130nm. On the other hand the gates are much slower than on Skywater 130nm.
Hopefully both programs will be around for a while, so if you are still interested when you have more time you can join the shuttle then.
I wonder if it wouldn't make sense for one of the ports to be designated the "uplink" port and if the switch receives a packet destined for something not in the table it forwards it out the uplink port so long as the packet did not arrive via that port. It could even save a bit of memory by not storing entries for the uplink port in the table.
> A network switch (also called switching hub, bridging hub, Ethernet switch, and—by the IEEE—MAC bridge[1]) is networking hardware that connects devices on a computer network by using packet switching to receive and forward data to the destination device.
And the proposed switch design - transmitting most packets to most ports without buffering - is basically a hub. If you transmit two packets at the same time you will most likely create a collision. A real switch can buffer one of the packets.
Unknown flooding is actually a pretty base requirement of ethernet switches per the 802.1 standard, even when the table is not full, anyways. Without it you can't form switched paths unless every switch in the path has recently heard a broadcast (or following regular flow) from the intended receiver. If you start each test case as a short loved one with an IPv4 client ARPing for neighbors or in a simple topology the this can easily be missed but wreak havoc in the real world. To not do so is as egregious to say you're an ethernet switch which does not flood broadcasts in terms of false claims of being an Ethernet compliant switch.
It might be another switch. Even if it's not; VM/container networking is often implemented by bridging the host's NIC to a virtual switch, exposing the MAC addresses of all VMs/containers to the network.