Looking into it, they are "folding" a logic chip to have shorter paths with their SRAMs, which is the main application of 3D integration these days, chucking memory (low-power) above high power logic die.
stacking logic chips is hard because they have to dissipate a lot of power, and stacking them multiplies your power density (which is already very high for the logic die, generally) by the number dies you stack~effectively. Most of the progress on these sorts of things have just been stacking layer on layer of memory on a single logic die.
It looks like they are folding other components other than memory onto the logic die which I haven't seen before, but this isn't cold fusion and even intel has thrusts doing this type of 3D integration.