It is interesting that over the years people have produced synthesizable RTL HDL for the 8086/8088 and later, with varying degrees of fidelity, but no-one seems to have produced similar for the 8087.
My educated guess is that primarily simply no-one has needed this, and secondarily it's hard. They're running softwares that can do all of their floating point in software anyway and they just don't need an 8087 on an FPGA. And floating point on an FPGA uses a lot of area, if one is taking the easy route of just emulating the external behaviour rather than the much harder task of emulating the clever microarchitecture that reduces it all to just 1 adder.