I think you miss understood the challenge. They are using a 60Msps ADC with a parallel port interface. The challenge is capturing the 600Mbit/s of data and having enough CPU and memory bandwidth to do anything useful with it.

If your microcontroller has a parallel port interface, you would use the clock setup you described. This works, I've done it before, but there was very little CPU left to do anything useful with the data.

It's neat that they used the PIO, its demonstrating how that peripheral fills a niche where you things that might have been impossible without an FPGA, suddenly become doable on a microcontroller.