Some more questions because the website isn't clear:
- does the FPGA handle digital beamforming in the FPGA fabric? or it controls RF phase shifters for analog beamforming?
- will we have access to FPGA pin constraint file so we can write our own verilog
- can I get IQ samples from the antenna elements and run my own beamforming algorithm / calibration in a separate PC with possible GPU acceleration? or it will be bottlenecked by rpi5 gigabit ethernet?