A Verilog to Factorio Compiler and Simulator (Working RISC-V CPU)

I wonder with the new Timberborn 1.0 update with automation if there’s enough to build a computer from water gates…

A technical interview at a company that uses Verilog.

Near future.

A candidate walks in. Big Factorio fan. The interviewer smiles and gestures toward a gaming PC. Factorio is already running.

The candidate squints. "What, are we gonna speedrun science in 40 minutes?"

The interviewer grins. "That would be too easy for you."

"Oh, I get it. No-belts challenge? Deathworld, no weapons? Rampant? Space Age blindfolded?"

"It's a debugging session," says the interviewer. "You know. The thing you'll actually be doing on the job."

"Got it. So what are we debugging? Train signals? Belt congestion? Fluid throughput? Nuclear ratios?"

The interviewer turns the monitor slightly.

"Here is a Hello World program in Verilog."

A beat.

"It has been transpiled into a Factorio map."

The candidate leans closer to the screen. Eyes agitated.

The interviewer smiles. "You just need to find a few problems with it."

... Curtain falls.

Happens to the best of us!

Thanks for showing it here!