Apple M5 Pro/Max and TSMC SOIC-MH 2.5D chiplet packaging

This doesn't pass the smell test.

#1: DRAM isn't in the same dies as processors. As far as I can tell that's not changing. (And saying that "RAM" which yes could mean cache or other SRAM being on the die is hardly a SoC).

#2: SiP and SoC are different things. It's weird to talk about how great SoC is in integrating the GPU as if iGPUs didn't exist before and then say "actually even better is if they're not on the same chip" (paraphrased) a few paragraphs later.

#3: the thermal contamination isn't something I've ever heard of being needed. Maybe they're different, but in general it's actually better to have your heat spread out more because it lets your cooling solution have more surface area to deal with. That's a lot of the point of the IHS on legacy desktop CPUs and unless you have an individual cooling solution for each die, they'll get "contaminated".

#4: if you need to move dies apart for physical separation, no it doesn't free up space for more cores. Because then you wouldn't have the space you just made for separation.

#5: if the definition of substrate is that it's a substrate, that's a bad definition. I think it's better to think of it as a mini very high density circuit board for die(s) vs a big PCB for chips.

#6: you can most certainly power off part of a die if you design it that way. Being SiP isn't required.

Honestly this reads very high horse from the author. Learned a few terms, saw a few press releases, and either Apple marketing is making stuff up or this person just does not know what they're talking about but they're super confident about it. And to top it all off, their concluding remark about InFO seems factually incorrect. According to TSMC's brief on this, InFO and SOIC are separate parts of packaging (https://3dfabric.tsmc.com/english/dedicatedFoundry/technolog...). InFO is about the substrate, SOIC is about the dies.