Comment by eschu | Hacker News Reader

Comment by eschu | Hacker News Reader

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SPICE uses modified nodal analysis (MNA), which leads to differential algebraic equations (DAEs). This is very well-suited to detailed semi-conductor models (a bunch of convergence helpers are used behind the scenes to make the simulation of extreme exponential transients possible).

PLECS, on the other hand, uses ideal switches (on/off) for MOSFETs, diodes, etc. This is, in a way, the "most extreme" form of nonlinearity. But by leaning into it, we can solve more efficiently the resulting circuit equations using far fewer degrees of freedom. PLECS uses a piecewise state-space fomulation (ODEs). A simplified approach like that is basically essential for high-frequency power electronics at system-level if you don't want to wait all day for your waveforms. But obviously the trade-off is that you can't see the switching transients, because they are instantaneous.

To get both type of analyses (zoomed in device-level v.s. multi-physics system-level), we had to build the complex schematics in two different softwares (PLECS and SPICE). This took a long time. It's also quite error prone, especially when complicated initialization or post-processing scripts are involved. With PLECS Spice, we solved our problem. We can build one schematic in PLECS and "spice-ify" the bits we care about within it using a configurable subsystem.

Thanks for clarifying. HN is ~generally more software centric, so this context is helpful.

So SPICE is a low-level circuit sim, and PLECS is a bit higher level as it ignores non-linearities at the device level. Does PLECS simulate at a level similar to that of the popular EDA tools like Cadence?

Roughly speaking yes, but Cadence has a large offering of products, so I need to be a little more specific. Ultimately, when you design analog devices with Cadence's tools, their transient behavior is simulated by Spectre (or FastSPICE) for IC (very) low-level analog validation. This is still SPICE, but with an engine really tailored for reading Verilog-A or large netlist descriptions (a format to describe circuits with plain text). Let's call this level 1.

They also have PSpice. Here, we are already speaking mixed-signal (including digital) for board-level simulation and systems. It competes with the likes of QSpice, the very popular Ltspice, SIMetrix etc. This is level 2.

Before PLECS or SIMPLIS, system-level designs that include controller, power-plant, thermal behavior and magnetics were also simulated with those tools. PLECS went one more level of abstraction higher so that all these systems could be simulated together (including say the power-train of a power electronic system that comprises battery to wheels of an electric car). This is level 3. Think of it like Simulink (MATLAB) but dedicated to the challenges of power electronics (high frequencies are difficult to simulate with general off-the-shelf simulators).

What is new now is that within PLECS, you can import SPICE netlists, effectively enabling level 2 and 3 within one tool, and even to some extent together in the same simulation run (ideal switches coexisting with SPICE models). So you can design top-down. You start from the system, and then deep dive by replacing, in some sub-circuits you care about, the PLECS ideal switches by the detailed SPICE models of your real devices. These are often provided by semiconductor manufacturers (and they may have been generated by an analog design tool from Cadence).

> you can't see the switching transients, because they are instantaneous.

Kids those days. So Plecs is an ideal simulator, or ?

PLECS uses ideal switches, but now with SPICE integrated you can import any netlist to create a new block, including semiconductors.

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