Proliferated with AI slop
To be transparent: LLM-assisted workflows were used in a limited capacity for unit test scaffolding and parts of the documentation, not for core system design or performance-critical logic. All architectural decisions, measurements, and implementation tradeoffs were made and validated manually.
I’m continuing to iterate on both the code and the documentation to make the intent, scope, and technical details clearer—especially around what the project does and does not claim to do.
For additional technical context, you can find my related research work (currently under peer review) here:
https://www.preprints.org/manuscript/202512.2293
https://www.preprints.org/manuscript/202512.2270
Thanks again for your time and attention!
// 3. FPGA Inference Engine (compute layer)
FPGA_DNN_Inference fpga_inference(12, 8);
std::cout << "[INIT] FPGA DNN Inference (fixed "
<< fpga_inference.get_fixed_latency_ns()
<< "ns latency)" << std::endl;