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Comment by izacus | Hacker News Reader

I wonder if in 2025 a company would even allowed to start before being curb stomped by Intel's IP lawyers. After all, they started making clones, something that China gets accused of a lot.

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Intel customers required a second source supplier, i.e. IBM, thus, AMD was providing that for Intel in the beginning. Then later on AMD created the x86 64bit commands, which Intel adopted from AMD so now both share the same ISA.

Can you explain what you tried so say with that?

Customer needs don't really matter in cases where monopolist (ab)uses the law to kill competition. That's the MAIN reason why monopolies are problematic.

The "required" in that sentence should be read strictly: some customers, mainly governmental, wouldn't have bought Intel chips in the first place without access to alternative suppliers (AMD and previously VIA). Intel had to give in.

I read GP to mean that Intel had strong incentive to cooperate in order to make the initial sale. That’s where the customer need was relevant.

Neither company were like they are now back then. Intel needed a second supplier for their chips because nobody trusted manufacturing from a single source provider.

That wasn't the case. Their customers were the military. The second sourcing was required if they wanted DoD contracts.

This article is not about that. This article is about the AMD Am9080, which was a unlicensed clone of the Intel 8080.

The licensing deals that legitimized AMD's unlicensed clones came later.

If the company was based in the EU, local regulation might encourage reverse-engineering.

See tangentially related topic from yesterday: https://news.ycombinator.com/item?id=46362927

EU or RU.

You can do it with HW accelerated emulation like Apple did with M1 CPUs. They implemented x86 compatible behavior in HW so the emulation has very good performance.

Another approach was Transmeta where the target ISA was microcoded, therefore done in "software".

They said that they implemented x86 ISA memory handling instructions, that substantially sped up the emulation. I don't remember exactly which now, but they explained this all in a WWDC video about the emulation.

Not instructions per se. Rosetta is a software based binary translator, and one of the most intensive parts about translating x86 to ARM is having to make sure all load/store instructions are strictly well ordered. To alleviate this pressure, Apple implemented the Total Store Ordering (TSO) feature in hardware, which makes sure that all ARM load and store instructions (transparently) follow the same memory ordering rules as x86.

It is funny to hear sometimes though:

"Apple created a chip which is not an X86! Its awesome! And the best thing about it is ... it does TSO does like an X86! Isn't that great?"

Only some of the time.

I think the last time I ran amd64 on my mac was months ago, a game.

There's a Linux patch that exposes it via prctl: https://lore.kernel.org/all/20240410211652.16640-1-zayd_qums...

There's also the CFINV instruction (architectural, part of FEAT_FLAGM), which helps with emulating the x86-64 CMP instruction.

Apple didn't implement x86 ISA in hardware, they have a few instructions that change memory behaviour to make emulation faster.

Maybe if you find a company as small as Intel was at the time.

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