A lot of my questions went away when I got to this line though:
> He’s also fully engaged in the third leg of the “democratizing chip design” stool: education.
This is a valiant effort. Chip design is a hard world to break into, and many applications that could benefit from ASICs aren't iterating or testing on it because it sucks to do. It's a lot of work to bring that skill ceiling down, but as a programmer I could see how an LLVM-style intermediate representation layer could help designers get up-and-running faster.