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Comment by free_bip | Hacker News Reader

Rosetta is a software translation layer, not a hardware translation layer. It doesn't take any die space.

Hardware acceleration [1]:

> One of the key reasons why Rosetta 2 provides such a high level of translation efficiency is the support of x86-64 memory ordering in the M1 SoC. The SoC also has dedicated instructions for computing x86 flags.

[1] https://en.wikipedia.org/wiki/Rosetta_(software)

While true, we're not talking about the chips losing TSO; Apple plans to keep Rosetta 2 for games and it has to remain fast because, well, it's video games. It also seems like they plan to keep their container tool[1]. This means they can't get rid of TSO at the silicon level and I have not heard this discussed as a possibility. We're only discussing the loss of the software support here. The answer to "How much die area does it use that could be used for performance?" is zero--they have chosen to do a partial phase-out that doesn't permit them to save the die space. They'd need to kill all remaining Rosetta 2 usage in order to cull the die space, and they seem to be going out of their way not to do this.

[1] https://github.com/apple/container -- uses Rosetta translation for x64 images.

> Rosetta is a software translation layer, not a hardware translation layer. It doesn't take any die space.

There is hardware acceleration in place that that only exists for it to, as you just stated, give it acceptable performance.

It does take up die space, but they're going to keep it around because they've decided to reduce the types of applications supported by Rosetta 2 (and the hardware that it exists only for it) will support.

So, seems like they've decided they can't fight the fact that gaming is a Windows thing, but there's no excuse for app developers.

Sure, this seems to be a restatement of my post, which started with "While true...", rather than a disagreement. I was pointing out which one of the "many acceptable opposing answers" Apple had chosen. They can't use that die area for performance because they're still using it even after this phase-out. (I'm not the person who wrote the original post.)

> We're only discussing the loss of the software support here

Schematically "Rosetta 2" is multiple things:

- hardware support (e.g TSO)

- binary translation (AOT + JIT)

- fat binaries (dylibs, frameworks, executables)

- UI (inspector checkbox, arch(1) command, ...)

My bet is that beyond the fancy high-level "Rosetta 2" word what will happen is that they'll simply stop shipping fat x86_64+aarch64 system binaries+frameworks[0], while the remainder remains.

[0]: or rather, heavily cull

So, the way to "use die area for performance" is to add more cache and branch predictor space. Because of this, anything that costs a lot of code size does consume it because it's using the cache up.

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