Comment by luu | Hacker News Reader

Comment by luu | Hacker News Reader

One of the coolest aspects of this machine is that everything is fully pipelined. This machine was designed to be fast, so if you’re careful, you can actually get one (or more) instruction every cycle. This has some interesting implications – there’s no ‘divide’ instruction

That's actually a common optimization, e.g, Itanium doesn't have divide; just reciprocal.

I haven't spent time doing assembly optimization for a very long time, but it used to be the case that, even in x86, you were often better off using various tricks to avoid having to divide. I'd be interested in hearing if that's still the case, from someone who does that sort of thing today.

The actual design was implemented in a Xilinx Spartan-3E 1600 development board.

I love that hardware has gotten so cheap. When I was a teenager, I implemented a Sega on an FPGA, and it took Virtex II board (very high end, at the time) to handle everything. Now, an entire supercomputer fits on one of Xilinx's Spartan (i.e., budget) boards.

That's actually a common optimization, e.g, Itanium doesn't have divide; just reciprocal.

It's a bit more interesting than that: The Itanium doesn't have a reciprocal either, just an approximation of the reciprocal accurate to about 9 bits, which can then be refined if more accuracy is needed.

That's the same way the Cray-1 does it. It uses 3 passes of newton's method (and I think is accurate to 28 bits for the first time through).

Vector pipelining is different from instruction pipelining. And the Itanic is a very different machine than a Cray-1. But in both cases the motivation is similar: to avoid operations with a variable cycle time.

The Cray has no variable time operations at all. All operations have fixed timing. This makes the implementation of vector pipelining much easier.

The Itanic on the other hand relies on the compiler to instructions for optimal instruction pipelining. To do this the compiler needs to know the latency of the operations.

For a x86 a reciprocal instruction makes less sense (except for vectors of course) since most x86 schedule instructions dynamically by hardware. It does make sense multiply with a constant instead of dividing, etc. But a reciprocal doesnt.

Reply on news.ycombinator.com