The architecture seems to be RISC-V array with standard RVV vector instruction set. That is a quite familiar environment for software developers compared to custom systolic arrays.
The architecture seems to be RISC-V array with standard RVV vector instruction set. That is a quite familiar environment for software developers compared to custom systolic arrays.
The original Google Coral lineup offered a 4TOPS accelerator back in 2018-2020.[3][4]
The original (4 TOPS) Coral used ~1 watt while this new Coral TPU is designed for 10mW/0.5 TOPS.[5] That power budget fits well alongside low power MCU's.
It doesn't appear to include any hardware accelerated video encoding[6] for H264/etc, which was also a massive limitation of the original google coral (improved slightly in the Dev Board Mini). There's a lot of documentation on consuming WebRTC content, and while streaming out is mentioned ... any encoding would have to be performed on one of the A55 cores at dubious performance levels. The RK3588, for example, includes a VPU for hardware accelerated video encoding (H264/HEVC encoding @ 8k30fps).
0: https://cdn.bfldr.com/ZU41R0OK/at/tjm5s8hrmz5mgqrjtsrc5c4/sl...
1: https://www.synaptics.com/products/embedded-processors/sl261...
2: https://cdn.bfldr.com/ZU41R0OK/at/ks4thp8bw9n3bt2ktms3k34s/s...
3: https://abopen.com/news/google-launches-coral-edge-tpu-devel...
4: https://developers.googleblog.com/en/new-coral-products-for-...
5: https://developers.google.com/coral/guides/power
6: https://synaptics-astra.github.io/doc/v/latest/linux/index.h...
What's upsetting about the state? Continued development?
however, to your point : being google affiliated is a huge red-flag for longevity.
Agreed that that no hardware video encode is pretty damned deflating.
Having such a low power device is incredibly enticing. Thanks for the good details. One random thing I'm kind of excited over, there's 3x I2S audio connections, which has some weird fun use cases (ideally a little field recorder?).
One curious thing, Google's post says they are still trying to finalize the matrix extensions for RISC-V. I'm assuming those simply aren't on these Synaptics chips?