What's cool is that the Raspberry-PI V is just fast enough to run modern desktop software, including (ack!) Microsoft Teams. I was able to give a live demo of my FPGA design by sharing the desktop during a conference call.
My only complaint is, of course, lack of SoC documentation from Broadcom.
Say what you will about Intel, but they do provide full chip documentation if you go through their NDA process. With it, I made a very nice FPGA PCIe environment on Xeon Ivy Bridge: it let me save all of the PCI config registers, then reconfigure the FPGA, then reprogram them and have the chip show up on the bus without having to reboot the server or re-enumerate. The trick is to temporarily set the root complex bit to disable PCIe error detection during the reconfiguration process.
(Was using Altera Stratix-IIgx at the time).
There is possibly another way to this, but haven't tried it:
https://stackoverflow.com/questions/32334870/how-to-do-a-tru...
But even aside from that, with the documentation you have access to a lot of error reporting which is extremely useful during PCIe bring-up.