Getting more efficient output is a nice bonus.
Getting more efficient output is a nice bonus.
Outside hobbies, I've been mostly away from this field for little over a decade by now. Is it still that bad? I remember back then, every single professional electronics engineer that I met had this die hard belief that this was simply how things work:
You want to use DerpSemi micro controllers? You must install DerpStudio '98! Not the later 2005 version tough, that has some major UI bugs. You want to program a HerpSoft PLC? You need EasyHerpes IDE! What, command line toolchain? Text editor? You must be completely insane!
It's been somewhat of a personal fight against windmills for me back then. That, plus suggesting that we are actually developing software and the C/Assembly/VHDL maybe shouldn't be an undocumented, tested-only-once pile of spaghetti based off a circuit diagram inside one guys head (and no, a 50 line comment block with a German transcription of the code below is not documentation).
You had it good back then. Now it's a one-line comment in Chinese. Line is 300 characters wide. /Yorkshire men skit.
PLCs and FPGAs are still pretty damn bad though.
It's that they're the only vendor supported method of working with the parts. If you build your product with an unsupported toolset and something doesn't work, you need to be prepared to reproduce the issue in the vendor support toolchain if you want support.
People coming from desktop and mobile development roll their eyes at this because they aren't coming across bugs in their x86-64 process or M1 Silicon that haven't already been patched over by some combination of microcode, the OS, and the toolchain. Everything works as expected.
Not so in the world of embedded. On modern complex systems, vendor involvement can be a critical part of the development process. Many of the products you have in your house like your router, Wifi gear, and IoT devices were probably co-developed to some degree with the hardware vendor. Starting with the vendor-provided reference design gets you to market much faster, even though you often could forge your own path with a separate toolchain and start from scratch.
It's still this way even in MCU development. You can go out and develop something like an STM32 system completely without STMicro's tools, but it's much easier to start the project in STMicro's tools and copy over the parts you need for setting up everything from clocks to peripherals, then to maintain a skeleton project in the official tools in case your separate toolchain starts acting funny.
And it's because those engineers do not demand. "I Want something easy to use and has GUI, not some Terminal command line"
IMHO yes, if not worse.
Working now with some advanced devices from Xilinx (using very expensive top-line SoC. If you change version of the Vivado tools, you have to basically start again from 0 your project. Is a complicated mess because of matching of the OS in the ARM controller and the FPGA part…
Vivado is expensive, bloated, buggy garbage.
The synthesis discussed in the linked page is one of the earliest steps, and from the point of view of open source implementations, the simplest one, because all necessary information is freely available.
Both of things either have already been reverse-engineered, or are in the process of being reverse-engineered.
Please provide a source for this claim. Yosys, for example, can't route [1] designs even for Xilinx 7-series devices, and that architecture has been introduced 15 years ago.
[1] Not to be confused with synthesis, mapping, or placing, all of which come earlier in the flow, and for all of which sufficient information is public available.
It works well enough to build a working litex RISC-V SOC capable of running Linux, for the QMTech Kintex-7 325T board.
I don't think the Cyclone V project has got as far, but I could be wrong. (It kind of slipped off my radar after I realised I was spending way too much time on Discord and purged all but a very few servers to reduce my distractions.)
When I see this, I suspect the vendor is operating under conditions that approach absolute chaos: dumping whatever junk someone imagines might be necessary into the stack with zero resistance, for years on end. Zero effort spent on any factoring that might threaten redundancy.
I think they've fixed this only a year ago or so.
On top of that, the "agile" mindset all too often also means there is no coherent vision where the project should go, which can and does lead to bad fundamental architecture decisions that need extensive and expensive workarounds later on.
And yes, there have been people describing exactly that in ASML [1], although the situation seems to have improved [2].
The open source tools still lack too many features to be useful for non-hobby development.