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The read and write times are apparently in the ~10ns range which is within the allowable range for DRAM (you'll have another 50-100 from the connectivity anyway)

It would be a waste to use this to just make DIMMs. It's only transistors, like SRAM cells, so you can efficiently fab them on the same process technology and the same dies as your logic.

Then again, there is wear, so either you accept a level of performance degeneration (dynamic capacity cache?) or you go to DIMMs anyway servicability.

https://www.imec-int.com/en/articles/capacitor-less-igzo-bas...

The graph on this page is awful, but those endurance lines on the right side are going up toward a century at optimal temperature.

I think we'll have to wait and see.

Agreed, but remember how bad flash memory was in the early SSD days.

I've watched a video about this DRAM tech, looklike the write cycle lifetime is acceptable for typical usecase