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Does RISC-V have speculative execution?

A RISC-V CPU out of graphene would be more efficient.

openhwgroup has open Verilog implementations of RISC-V cores from 2 stages through 6 stages that will boot Linux: https://github.com/openhwgroup

There are various optional feature flags for RISC-V.

The RISC-V open ISA is probably advantageous especially for research implementations.