Is PCI like really expensive? I always wonder why these types of boards are so reluctant to add a PCI-Express slot.
First, SBC processors are just a step up from microcontrollers, they're designed to talk to GPIO devices and servos and UARTs and sensors, not GPUs and network cards. The JH7110 only has a two lanes of PCIe 2.0, one of which is used for USB 3.0 and the other mostly (I assume) to provide an M.2 interface. However, it also has 6 UARTs (Universal Asynchronous Receiver-Transmitter, think RS232 serial), 7 channels of SPI (not counting the QSPI Flash controller directly integrated), 8 channels of PWM, 7 channels of I2C, 64 channels of general-purpose IO, I2S, SPDIF, two channels of CANbus, a directly integrated Ethernet MAC, USB 2.0 host, a MIPI-CSI camera interface and a MIPI-DSI video display block with either HDMI output or for directly driving a 24-channel parallel LCD.
Embedded system designers don't want to add a PCIe-to-RS232 card to their industrial robot, NAS, or video camera, heck, they don't want to add an external GPU. They don't even want to add a separate northbridge/southbridge or PCH, they want a single-chip SOM. Going up and down those layers between PCIe and SATA or USB or Ethernet is expensive in terms of chip count and power.
Second, I don't think they want to deal with the drivers. If you want to plug in your choice of PCIe device - be it a GPU, RAID card, sound card, who knows what - that's a level of compatibility and modularity that SBCs are bad at.
PCI Express x1 requires only 11 data signals plus Vcc and Gnd across 18 pins, but even the v1 spec from 2003 requires a data rate of 2.5GT/s (as opposed to PCI's data rate of only 33 MT/s). This is a much higher rate than most other data signals usually found on these boards, and rates this high have their own challenges in terms of signal routing.
1. It is non-trivial additional work to add since these are high frequency signals.
2. It is non-trivial additional work to validate.
3. The hardware PCI-E support is likely buggy because it is not well tested and few want to volunteer to spend time working with the SoC supplier on the bugs.
And there it is. Yes, PCI-E 3.0 from 2010, 15 years ago, involves 4 GHz wire level signals. A 4x PCI-E connector has four differential pairs of this, not cross-talking, not violating EMC limits, etc. This requires excellent layout and high quality PCBs with enough layers.
Never mind 4.0, 5.0...
People just do not appreciate what their expectations entail. A recent discussion about "soldered" RAM in the Framework Desktop thread illustrates this, where someone just can't accept that there are reasons for the things board designers do. After you get done routing the display connector, multiple ethernet, USB, DRAM and all the other high frequency stuff on a couple square inches of low cost PCB, there isn't much room for the stretch goal of PCI-E good enough to get through EMI testing.
It is possible. Raspberry Pi did it. But it's a question of cost, talent and time-to-market.
Well this board does have a lane. And that's within spitting distance of USB 3 which has some pretty cheap implementations. Entire USB 3 hubs cost $2.
I was writing generally about the comments I see about these types of low cost boards: we are awash in these products, which is a good thing, but many are not designed with the care, tools, talent and materials necessary to max out high value features like PCI-E, and people frequently complain about the lack of PCI-E, not understanding what is involved.
Personally, I'd like to see a "headless" board forgo nearly all of the typical peripherals. Have a 1x PCI-E M.2 for boot, 1x 10/100 Ethernet for a shell, then a number of PCI-E 1x and 4x connectors for whatever one might want. Let an ecosystem of mini PCI-E boards develop around it such that one could plug-in whatever is desired: WiFi/Bluetooth/LoRa, xGB ethernet, USB 3/4/x, HDMI, MIPI, ADC/DAC, etc.
It would require someone to develop a SOC intended for this, as opposed to repurposing Broadcom's phone chips and whatnot. But with so many RISC-V SOC manufacturers around now, this is no longer implausible.
If there's lockin because they're stuck using particular chips, that makes sense. But it's not because there's particular difficulty in dealing with the signal rates of PCIe 3 or at least 2.
Though, it looks like on the lite version mentioned here, there is but one PCIe lave available on the slot.
Edit: Adding the size is likely the reason and full regular PCIe is not there. The PCIe card would likely be as big as the board it self. :)
The number of PCIe lanes available is typically defined by the CPU in an SoC context or the lowest common between the CPU and chipset in a traditional motherboard architecture. M.2 defines a physical connector that may connect to different things depended on its intended use. An example is the difference between those intended for SATA or NVMe. Additionally it is common for lower bandwidth peripherals like wifi cards to use an M.2 connector although only be wired into a subset of the board's possible PCIe lanes.
https://www.crucial.com/articles/about-ssd/m2-with-pcie-or-s...
And some of those don't use PCIe at all - the connector can also carry USB signals.
https://pcisig.com/pci-express%C2%AE-oculink-specification-r...