Atopile – Design circuit boards with code | Hacker News Reader

Atopile – Design circuit boards with code

atopile.io

105 pointspoly2it30 comments

If the important thing is "with code" then show me the code.

I gave up hunting through your website because I never managed to find an example of what the code for a real circuit looks like. That should be front and center on the first page.

You must have given up pretty quick."ato Language" in the left-hand navigator under "Essentials" is pretty obvious.

https://atopile.io/atopile/essentials/1-the-ato-language

That's a language definition not an example of what a real circuit looks like in code.

Where is an example like a "Full Bridge Rectifier"?

This project looked like an interesting example of what was possible: https://github.com/atopile/spin-servo-drive

https://github.com/atopile/cell-sim/ also quite interessting.

How about this?

https://packages.atopile.io/packages/atopile/ti-lv284x/relea...

That example puts silkscreen reference designators on component pads, which is... not great.

I agree - we need a large example not the toy examples of NeoPixels chained together. Also, in the Github module library, I found only ESP32-C3 modules but the hobbyists use ESP8266 and ESP32 and ESP12-E as well as STM dev modules...I suppose its one of those things where contributors will help populate the library but I don't see instructions on how to build all the artifacts I see in the library - there are atleast 12 artifacts for each module...

Fair enough! We definitely need a better landing page, we are just coming out of a long period of building, will all be getting some much needed polish soon!

Here is one of our more recent demo projects you can check out that shows how a larger project is structured: https://github.com/atopile/nonos/blob/main/elec/src/nonos.at...

And an example of modeling a component: https://github.com/atopile/packages/tree/main/packages/archi...

So, as noted by yodon you have to go a long way through the website to figure out what this actually is:

https://atopile.io/atopile/essentials/1-the-ato-language

So the idea is you basically do all of your connections (the netlist) in code. That actually seems like a reasonable idea to me, especially for digital electronics.

However, I would say that schematic capture is only a small minority of the work of most circuit design. Probably 90% is creating components and layout/routing.

> If you want to layout or route PCBs you will need to install KiCAD.

I couldn't really figure out what the deal is with components. They have a website with a few packages on it (https://packages.atopile.io/) and they say:

> Check first-party packages for a list designed and used internally at atopile. Discussion planning to open this up publicly These are built, known to work and come with a functioning layout too.

Ah also I didn't realise this is actually a startup. Makes sense given how much effort seems to have gone into that website!

Our vision is not schematic capture, but intent capture. Once you can capture intent it can trickle down to schematics, layout, BOM selection etc. The language is pretty simple at the moment and building out from the 'minimum useful product' which is basically replacing the schematic.

The schematic is not most of the work, but it is the place that most of the work is relying on as a source of truth. Everything from firmware header files, end of line testing, reliability tests to service manuals. Today as an engineer you end up in the middle of that. Once you have a complete description, much of the boiler plate work can be automated.

We have done quite alot on the components and routing section of the work as well, we can generate most components for you automatically without leaving the IDE and have a growing list of fully auto-selected components. Instead of going to digkey to find a 10kohm 1% 0402, you can just give those specs to our tool and it will automatically pick the most suitable one for you, considering things like price and stock (plus eventually any other filtering you might care about, including custom libraries). For layout we currently just to layout reuse blocks, which is actually a crazy time saver for how simple it is. https://packages.atopile.io/ currently has ~10s of parts, but we are growing it over the next few weeks to ~thousands, so most parts you want to use will have a reference design + layout you can install and use in your project, just like you would NPM/pypi.

You're going to win and it's going to be easier than you ever imagined

Firmware is a good point!

I think relying on "we have a big set of components" is never going to work though. There are literally millions of components, often with unique footprints. You'll never cover even them all or even close to it. It needs to be easy to make your own.

Anyway good luck. PCB EDA could definitely do with some modernisation.

title says design circuit boards, but it looks to just be netlist generation which is used as input to an external layout tool. step 5 is to use kicad to do lay out.

https://atopile.io/atopile/quickstart#a-typical-workflow

A typical workflow

1. Sketch your circuit on paper.

2. Search https://packages.atopile.io and GitHub for pre-existing modules you need, and use ato install to install them.

3. Design a module and do its calculations using ato code.

4. Run ato build to compile your project, choose components to suit your design, and update your layout (PCB) file.

5. Use KiCAD to lay out any changes

6. Repeat steps 3-5 until you’re happy with your design.

7. When you’re done with your design, push your changes to your repo.

8. CI will automatically build and test your project, and generate the manufacturing files you need to order your PCBs.

9. Take these manufacturing files to your PCB manufacturer to get your PCBAs.

It still makes sense though. In many cases, especially in digital design, circuits look like islands of isolated components where the labels are actually defining the connections between them.

I would agree if manufacturers bothered to provide machine readable data sheets [0]. If you have to read the data sheet and manually write your component definitions, then this won't be much faster than doing it with a GUI.

[0] To be fair I'm not a professional electrical engineer, maybe there are expensive databases that I don't have access to. I personally always thought that EDA tools have a natural business opportunity where they give you the razor for free (the EDA software) and sell you the razor blades (e.g. part libraries).

For some more context, here is a typical example:

https://dl.espressif.com/dl/schematics/esp32_devkitc_v4-sch....

Most semiconductor vendors have now outsourced library creations (for free to end users) to services like UltraLibrarian where you pick what you want and download.

The quality however is meh.

Libraries are a very touchy subject. Most of the time, outsiders to the field just want "plug and play".

Professionals in the field? Holy fucking hell can we get neurotic. In a large company you may have more than one person dedicated just to managing libraries and drawing them to your standards instead of letting the internet do it. And there's a whole list of reasons why one may do it vs. not do so. (Schematics are a form of design expression and as such there are many standards and thoughts on optimal forms of expression, including dependency on the particular sub-industry you are)

No different than software engineers having their favorite programming language, markup language, config file language, code style guidelines, deployment workflows, etc.

I think there is actually some really neat stuff to be built here. I think layout engineers would love to be able to write down their 'style guide' that is basically a set of parameters modifying the footprint. We would have a 'common' representation, basically a definition of the package itself that would be transformed to whatever you might like for the pad/silk shapes. Something very similar to having a linter in code that would enforce company best practices.

We already provide the 'plug and play' version which looks quite alot like LCSC data and is certainly good enough for playing around with. Id really like to put some effort into standardizing this in the mid-term, seems pretty crazy to me that there are way more footprints designs out there than actual packages.

I understand as someone who has played factorio and then had an engineering friend join my game and rebuild everything so it's lined up and shorter belts

I basically dont write ato code when designing modules any more, claude code + rules file + a few decent examples and an MCP for basic functions like building, finding parts and inspecting library components is able to do a pretty great job. As an example, claude one-shotted this MPU6050 design: https://github.com/atopile/packages/blob/multi/adafruit_heis...

Currently working on a pipeline to generate a whole bunch of these automatically, stick them on some big test boards and make sure they actually work. We will be selling razor blades, and will have the test data to show they work.

I guess what I'm not seeing, and I feel this way about all circuits as code, is why this isn't just a file format spec. I appreciate the INA228 example showing that it can describe functions/constraints of the part. I've certainly made mistakes (and had reviewers catch some of them) with swapped SDA/SCL or voltages being too high. Basically, things you can't always tell from the symbol itself or won't get caught by DRC. Buuuuut, my problem with this is that it feels better suited to be a way to DRC other EDA tools.

For example, most of the .ato files are just basically netlists? https://github.com/atopile/spin-servo-drive/blob/main/elec/s... for example is just a bunch of "this connects to that". We really need a whole new for that? I feel like this could all be done with an xml or something. Maybe more modern like a yaml idk. Every one of these solutions has its own language with its own limitations, instead of using what's around first and focusing on what makes this *better* than click and drag. Because I have to say,

> cm5.cm5.ethernet.pairs[0].n.line.override_net_name = "eth0_N"

Just cannot be easier than plopping down a net label.

I’m did some vibe hardware design using atopile recently - it’s surprisingly good. https://youtu.be/UQCpDarEoBc

Sounds awesome. Would love to see a video demonstration of it

I think a hardware design language for schematics makes a lot of sense (that's what this appears to be), but good luck doing board layout (the hard part).

Previously:

Show HN: Atopile – Design circuit boards with code - https://news.ycombinator.com/item?id=39263854 - Feb 2024 (292 comments)

My reaction to the first comment would be that for more flexibility you could write a Python script to generate the .ato netlist.

Sure.

But that flexibility means that you lose a lot of common constraints that are actually desirable.

We think both are pretty important. For most people, the ato language should be sufficiently powerful, for module designers we have a python interface that allows for more complex designs.

For example the INA228 from TI has a funky addressing scheme that is not possible to describe in ato, so we create a hybrid module:

atopile for the main structure: https://github.com/atopile/packages/blob/multi/adafruit_heis...

compose in an 'addressor' python module: https://github.com/atopile/packages/blob/multi/adafruit_heis...

Above links broken: https://github.com/atopile/packages/blob/main/packages/ti-in... https://github.com/atopile/packages/blob/main/packages/ti-in...

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