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Comment by thijson | Hacker News Reader
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thijson
·
It would be nice to have a simulator like Verilator for VHDL.
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kvemkon
·
There is mature GHDL
https://github.com/ghdl/ghdl
and rather new NVC
https://github.com/nickg/nvc
.
thijson
·
I was aware of GHDL. NVC looks like it's potentially more performant.
rluoy
·
LLVM never works in EDA.
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